Search

John D. Blanton

Examiner (ID: 12088)

Most Active Art Unit
2466
Art Unit(s)
2466, 2619, 2419
Total Applications
1157
Issued Applications
871
Pending Applications
78
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9379112 [patent_doc_number] => 08683398 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Automated synthesis of high-performance two operand binary parallel prefix adder' [patent_app_type] => utility [patent_app_number] => 13/686624 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 10378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686624
Automated synthesis of high-performance two operand binary parallel prefix adder Nov 26, 2012 Issued
Array ( [id] => 9585969 [patent_doc_number] => 08775980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Trench silicide mask generation using designated trench transfer and trench block regions' [patent_app_type] => utility [patent_app_number] => 13/686203 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686203 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686203
Trench silicide mask generation using designated trench transfer and trench block regions Nov 26, 2012 Issued
Array ( [id] => 9493342 [patent_doc_number] => 20140143748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-22 [patent_title] => 'SEMICONDUCTOR TIMING IMPROVEMENT' [patent_app_type] => utility [patent_app_number] => 13/683228 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6923 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13683228 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/683228
Semiconductor timing improvement Nov 20, 2012 Issued
Array ( [id] => 9493339 [patent_doc_number] => 20140143745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-22 [patent_title] => 'TECHNIQUES FOR SEGMENTING OF HARDWARE TRACE AND VERIFICATION OF INDIVIDUAL TRACE SEGMENTS' [patent_app_type] => utility [patent_app_number] => 13/680253 [patent_app_country] => US [patent_app_date] => 2012-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3462 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13680253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/680253
Techniques for segmenting of hardware trace and verification of individual trace segments Nov 18, 2012 Issued
Array ( [id] => 9954523 [patent_doc_number] => 09003337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Systems and methods of local focus error compensation for semiconductor processes' [patent_app_type] => utility [patent_app_number] => 13/671581 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 9608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671581 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/671581
Systems and methods of local focus error compensation for semiconductor processes Nov 7, 2012 Issued
Array ( [id] => 8816676 [patent_doc_number] => 20130117721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'METHOD AND SYSTEM FOR VERIFICATION OF ELECTRICAL CIRCUIT DESIGNS AT PROCESS, VOLTAGE, AND TEMPERATURE CORNERS' [patent_app_type] => utility [patent_app_number] => 13/671124 [patent_app_country] => US [patent_app_date] => 2012-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8551 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671124 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/671124
Method and system for verification of electrical circuit designs at process, voltage, and temperature corners Nov 6, 2012 Issued
Array ( [id] => 9248600 [patent_doc_number] => 08612902 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Retargeting multiple patterned integrated circuit device designs' [patent_app_type] => utility [patent_app_number] => 13/628278 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6286 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628278 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628278
Retargeting multiple patterned integrated circuit device designs Sep 26, 2012 Issued
Array ( [id] => 8961238 [patent_doc_number] => 20130200840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'BATTERY MANAGING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/626985 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1179 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626985 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626985
BATTERY MANAGING SYSTEM AND METHOD Sep 25, 2012 Abandoned
Array ( [id] => 9189206 [patent_doc_number] => 20130328521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'EXTERNAL BATTERY-MANAGEMENT MODULE' [patent_app_type] => utility [patent_app_number] => 13/627919 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6972 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13627919 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/627919
EXTERNAL BATTERY-MANAGEMENT MODULE Sep 25, 2012 Abandoned
Array ( [id] => 9381367 [patent_doc_number] => 20140084848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'Temperature-Controlled Power Supply System and Method' [patent_app_type] => utility [patent_app_number] => 13/628030 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628030
Temperature-controlled power supply system and method Sep 25, 2012 Issued
Array ( [id] => 10112604 [patent_doc_number] => 09148026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Charger detection with proprietary charger support' [patent_app_type] => utility [patent_app_number] => 13/627377 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6723 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13627377 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/627377
Charger detection with proprietary charger support Sep 25, 2012 Issued
Array ( [id] => 10107188 [patent_doc_number] => 09142974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Configurable power supply system' [patent_app_type] => utility [patent_app_number] => 13/628008 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3502 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628008 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628008
Configurable power supply system Sep 25, 2012 Issued
Array ( [id] => 8742933 [patent_doc_number] => 20130082650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'WIRELESS CHARGING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/626798 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3948 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626798 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626798
Wireless charging system Sep 24, 2012 Issued
Array ( [id] => 9381365 [patent_doc_number] => 20140084846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'Method and Circuitry to Adaptively Charge a Battery/Cell' [patent_app_type] => utility [patent_app_number] => 13/626605 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626605 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626605
Method and circuitry to adaptively charge a battery/cell Sep 24, 2012 Issued
Array ( [id] => 8730737 [patent_doc_number] => 20130076306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'WIRELESS POWER TRANSMISSION SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/626783 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4965 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626783 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626783
WIRELESS POWER TRANSMISSION SYSTEM Sep 24, 2012 Abandoned
Array ( [id] => 9444375 [patent_doc_number] => 08713511 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-29 [patent_title] => 'Tools and methods for yield-aware semiconductor manufacturing process target generation' [patent_app_type] => utility [patent_app_number] => 13/621698 [patent_app_country] => US [patent_app_date] => 2012-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13621698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/621698
Tools and methods for yield-aware semiconductor manufacturing process target generation Sep 16, 2012 Issued
Array ( [id] => 9257969 [patent_doc_number] => 08621412 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-31 [patent_title] => 'Micro-regions for auto place and route optimization' [patent_app_type] => utility [patent_app_number] => 13/610638 [patent_app_country] => US [patent_app_date] => 2012-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8180 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610638 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/610638
Micro-regions for auto place and route optimization Sep 10, 2012 Issued
Array ( [id] => 8583475 [patent_doc_number] => 20130002296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'THREE DIMENSIONAL INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/609108 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13609108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/609108
Three dimensional integrated circuits Sep 9, 2012 Issued
Array ( [id] => 9248613 [patent_doc_number] => 08612915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Reducing leakage in standard cells' [patent_app_type] => utility [patent_app_number] => 13/606858 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606858 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/606858
Reducing leakage in standard cells Sep 6, 2012 Issued
Array ( [id] => 8699185 [patent_doc_number] => 20130061194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'LAYOUT METHOD, LAYOUT APPARATUS, AND PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/604058 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6312 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604058 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604058
LAYOUT METHOD, LAYOUT APPARATUS, AND PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT Sep 4, 2012 Abandoned
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