
John D. Blanton
Examiner (ID: 12088)
| Most Active Art Unit | 2466 |
| Art Unit(s) | 2466, 2619, 2419 |
| Total Applications | 1157 |
| Issued Applications | 871 |
| Pending Applications | 78 |
| Abandoned Applications | 233 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[patent_doc_number] => 20090249269
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[patent_title] => 'PROPERTY CHECKING SYSTEM, PROPERTY CHECKING METHOD, AND COMPUTER-READABLE STORAGE MEDIUM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/409860 | PROPERTY CHECKING SYSTEM, PROPERTY CHECKING METHOD, AND COMPUTER-READABLE STORAGE MEDIUM | Mar 23, 2009 | Abandoned |
Array
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[patent_title] => 'ROUTER-AIDED POST-PLACEMENT-AND-ROUTING-RETIMING'
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Array
(
[id] => 6587794
[patent_doc_number] => 20100235803
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[patent_issue_date] => 2010-09-16
[patent_title] => 'Method and Apparatus for Automatically Connecting Component Interfaces in a Model Description'
[patent_app_type] => utility
[patent_app_number] => 12/404844
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/404844 | Method and Apparatus for Automatically Connecting Component Interfaces in a Model Description | Mar 15, 2009 | Abandoned |
Array
(
[id] => 6652422
[patent_doc_number] => 20100229136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-09
[patent_title] => 'CROSSTALK TIME-DELAY ANALYSIS USING RANDOM VARIABLES'
[patent_app_type] => utility
[patent_app_number] => 12/399704
[patent_app_country] => US
[patent_app_date] => 2009-03-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/399704 | Crosstalk time-delay analysis using random variables | Mar 5, 2009 | Issued |
Array
(
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[patent_doc_number] => 20090195498
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[patent_issue_date] => 2009-08-06
[patent_title] => 'Signal Generator Providing ISI Scaling to Touchstone Files'
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[patent_app_number] => 12/357298
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/357298 | Signal generator providing ISI scaling to touchstone files | Jan 20, 2009 | Issued |
Array
(
[id] => 8799633
[patent_doc_number] => 08438522
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[patent_issue_date] => 2013-05-07
[patent_title] => 'Logic element architecture for generic logic chains in programmable devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/237076 | Logic element architecture for generic logic chains in programmable devices | Sep 23, 2008 | Issued |
Array
(
[id] => 8530728
[patent_doc_number] => 08307312
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[patent_issue_date] => 2012-11-06
[patent_title] => 'Simulation method of logic circuit'
[patent_app_type] => utility
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/190477 | Simulation method of logic circuit | Aug 11, 2008 | Issued |
Array
(
[id] => 6376664
[patent_doc_number] => 20100316142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-16
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGNING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/514834
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/514834 | SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGNING METHOD THEREOF | Jul 6, 2008 | Abandoned |
Array
(
[id] => 5405137
[patent_doc_number] => 20090240452
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[patent_title] => 'SYSTEM AND METHOD FOR WIRELESS AND DYNAMIC INTRA-PROCESS MEASUREMENT OF INTEGRATED CIRCUIT PARAMETERS'
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[patent_app_number] => 12/053705
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[pdf_file] => publications/A1/0240/20090240452.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/053705 | System and method for wireless and dynamic intra-process measurement of integrated circuit parameters | Mar 23, 2008 | Issued |
Array
(
[id] => 6191293
[patent_doc_number] => 20110173577
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-14
[patent_title] => 'Techniques for Pattern Process Tuning and Design Optimization for Maximizing Process-Sensitive Circuit Yields'
[patent_app_type] => utility
[patent_app_number] => 12/024390
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[patent_app_date] => 2008-02-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/024390 | Techniques for Pattern Process Tuning and Design Optimization for Maximizing Process-Sensitive Circuit Yields | Jan 31, 2008 | Abandoned |
Array
(
[id] => 8354711
[patent_doc_number] => 08250055
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[patent_issue_date] => 2012-08-21
[patent_title] => 'Non-linear dynamical search engine'
[patent_app_type] => utility
[patent_app_number] => 12/517959
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/517959 | Non-linear dynamical search engine | Dec 4, 2007 | Issued |
Array
(
[id] => 8810429
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[patent_title] => 'Method and system for parallel processing of IC design layouts'
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Array
(
[id] => 8899598
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/455134 | Active trace assertion based verification system | Jun 15, 2006 | Issued |