Search

John D Freeman

Examiner (ID: 17393, Phone: (571)270-3469 , Office: P/1787 )

Most Active Art Unit
1787
Art Unit(s)
4174, 1794, 1787
Total Applications
752
Issued Applications
292
Pending Applications
67
Abandoned Applications
393

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 851736 [patent_doc_number] => 07383237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Computer-aided image analysis' [patent_app_type] => utility [patent_app_number] => 11/349542 [patent_app_country] => US [patent_app_date] => 2006-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 15039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/383/07383237.pdf [firstpage_image] =>[orig_patent_app_number] => 11349542 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349542
Computer-aided image analysis Feb 5, 2006 Issued
Array ( [id] => 4810560 [patent_doc_number] => 20080191191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Light Emitting Diode of a Nanorod Array Structure Having a Nitride-Based Multi Quantum Well' [patent_app_type] => utility [patent_app_number] => 11/993966 [patent_app_country] => US [patent_app_date] => 2005-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6886 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20080191191.pdf [firstpage_image] =>[orig_patent_app_number] => 11993966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/993966
Light Emitting Diode of a Nanorod Array Structure Having a Nitride-Based Multi Quantum Well Jun 26, 2005 Abandoned
Array ( [id] => 5894817 [patent_doc_number] => 20060003356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Compositions and methods for the diagnosis and treatment of kidney disease' [patent_app_type] => utility [patent_app_number] => 11/126395 [patent_app_country] => US [patent_app_date] => 2005-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11019 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20060003356.pdf [firstpage_image] =>[orig_patent_app_number] => 11126395 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/126395
Compositions and methods for the diagnosis and treatment of kidney disease May 10, 2005 Abandoned
Array ( [id] => 749604 [patent_doc_number] => 07022565 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-04 [patent_title] => 'Method of fabricating a trench capacitor of a mixed mode integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/996361 [patent_app_country] => US [patent_app_date] => 2004-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1931 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/022/07022565.pdf [firstpage_image] =>[orig_patent_app_number] => 10996361 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/996361
Method of fabricating a trench capacitor of a mixed mode integrated circuit Nov 25, 2004 Issued
Array ( [id] => 768972 [patent_doc_number] => 07005319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-28 [patent_title] => 'Global planarization of wafer scale package with precision die thickness control' [patent_app_type] => utility [patent_app_number] => 10/993941 [patent_app_country] => US [patent_app_date] => 2004-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 11153 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005319.pdf [firstpage_image] =>[orig_patent_app_number] => 10993941 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/993941
Global planarization of wafer scale package with precision die thickness control Nov 18, 2004 Issued
Array ( [id] => 5720856 [patent_doc_number] => 20060073631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Phase change memory with damascene memory element' [patent_app_type] => utility [patent_app_number] => 10/949090 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3938 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20060073631.pdf [firstpage_image] =>[orig_patent_app_number] => 10949090 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/949090
Phase change memory with damascene memory element Sep 23, 2004 Issued
Array ( [id] => 694694 [patent_doc_number] => 07071038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method of forming a semiconductor device having a dielectric layer with high dielectric constant' [patent_app_type] => utility [patent_app_number] => 10/946938 [patent_app_country] => US [patent_app_date] => 2004-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3088 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071038.pdf [firstpage_image] =>[orig_patent_app_number] => 10946938 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/946938
Method of forming a semiconductor device having a dielectric layer with high dielectric constant Sep 21, 2004 Issued
Array ( [id] => 668431 [patent_doc_number] => 07094672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Method for forming self-aligned contact in semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/940772 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2400 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/094/07094672.pdf [firstpage_image] =>[orig_patent_app_number] => 10940772 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/940772
Method for forming self-aligned contact in semiconductor device Sep 14, 2004 Issued
Array ( [id] => 5903575 [patent_doc_number] => 20060046453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Method for filling electrically different features' [patent_app_type] => utility [patent_app_number] => 10/931822 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5125 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 37 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046453.pdf [firstpage_image] =>[orig_patent_app_number] => 10931822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931822
Method for filling electrically different features Aug 31, 2004 Issued
Array ( [id] => 612714 [patent_doc_number] => 07148111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Method of manufacturing a trench transistor having a heavy body region' [patent_app_type] => utility [patent_app_number] => 10/927788 [patent_app_country] => US [patent_app_date] => 2004-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 4769 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148111.pdf [firstpage_image] =>[orig_patent_app_number] => 10927788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/927788
Method of manufacturing a trench transistor having a heavy body region Aug 26, 2004 Issued
Array ( [id] => 979026 [patent_doc_number] => 06930031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Bumping process' [patent_app_type] => utility [patent_app_number] => 10/710621 [patent_app_country] => US [patent_app_date] => 2004-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 3435 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930031.pdf [firstpage_image] =>[orig_patent_app_number] => 10710621 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/710621
Bumping process Jul 25, 2004 Issued
Array ( [id] => 724508 [patent_doc_number] => 07045457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Film forming material, film forming method, and silicide film' [patent_app_type] => utility [patent_app_number] => 10/895871 [patent_app_country] => US [patent_app_date] => 2004-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3258 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045457.pdf [firstpage_image] =>[orig_patent_app_number] => 10895871 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/895871
Film forming material, film forming method, and silicide film Jul 21, 2004 Issued
Array ( [id] => 7213005 [patent_doc_number] => 20050054215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Patterned functionalized silicon surfaces' [patent_app_type] => utility [patent_app_number] => 10/887792 [patent_app_country] => US [patent_app_date] => 2004-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6828 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20050054215.pdf [firstpage_image] =>[orig_patent_app_number] => 10887792 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/887792
Patterned functionalized silicon surfaces Jul 8, 2004 Issued
Array ( [id] => 1059498 [patent_doc_number] => 06852588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'Methods of fabricating semiconductor structures comprising epitaxial Hf3Si2 layers' [patent_app_type] => utility [patent_app_number] => 10/883181 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3406 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/852/06852588.pdf [firstpage_image] =>[orig_patent_app_number] => 10883181 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883181
Methods of fabricating semiconductor structures comprising epitaxial Hf3Si2 layers Jun 29, 2004 Issued
Array ( [id] => 690369 [patent_doc_number] => 07074627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Lead solder indicator and method' [patent_app_type] => utility [patent_app_number] => 10/879242 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3995 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/074/07074627.pdf [firstpage_image] =>[orig_patent_app_number] => 10879242 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879242
Lead solder indicator and method Jun 28, 2004 Issued
Array ( [id] => 7136846 [patent_doc_number] => 20050181538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Semiconductor device for wire-bonding and flip-chip bonding package and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/876581 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3276 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20050181538.pdf [firstpage_image] =>[orig_patent_app_number] => 10876581 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/876581
Semiconductor device for wire-bonding and flip-chip bonding package and manufacturing method thereof Jun 27, 2004 Abandoned
Array ( [id] => 1071858 [patent_doc_number] => 06841442 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method for forming metal contact of semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/875481 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1901 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841442.pdf [firstpage_image] =>[orig_patent_app_number] => 10875481 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/875481
Method for forming metal contact of semiconductor device Jun 23, 2004 Issued
Array ( [id] => 662657 [patent_doc_number] => 07101754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Titanium silicate films with high dielectric constant' [patent_app_type] => utility [patent_app_number] => 10/864472 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 6619 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/101/07101754.pdf [firstpage_image] =>[orig_patent_app_number] => 10864472 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864472
Titanium silicate films with high dielectric constant Jun 9, 2004 Issued
Array ( [id] => 728292 [patent_doc_number] => 07041530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Method of production of nano particle dispersed composite material' [patent_app_type] => utility [patent_app_number] => 10/864881 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 8444 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/041/07041530.pdf [firstpage_image] =>[orig_patent_app_number] => 10864881 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864881
Method of production of nano particle dispersed composite material Jun 9, 2004 Issued
Array ( [id] => 7229017 [patent_doc_number] => 20050269709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Interconnect structure including tungsten nitride and a method of manufacture therefor' [patent_app_type] => utility [patent_app_number] => 10/860621 [patent_app_country] => US [patent_app_date] => 2004-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2805 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20050269709.pdf [firstpage_image] =>[orig_patent_app_number] => 10860621 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/860621
Interconnect structure including tungsten nitride and a method of manufacture therefor Jun 2, 2004 Abandoned
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