Search

John D. Lee

Examiner (ID: 17114)

Most Active Art Unit
2501
Art Unit(s)
2874, 2606, 2507, 2501, 2504, 3621
Total Applications
2783
Issued Applications
2467
Pending Applications
118
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4938935 [patent_doc_number] => 20080076254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Blanket resist to protect active side of semiconductor' [patent_app_type] => utility [patent_app_number] => 11/528255 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20080076254.pdf [firstpage_image] =>[orig_patent_app_number] => 11528255 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/528255
Blanket resist to protect active side of semiconductor Sep 26, 2006 Issued
Array ( [id] => 5107102 [patent_doc_number] => 20070065980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Method of manufacturing semiconductor chip' [patent_app_type] => utility [patent_app_number] => 11/523576 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4717 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20070065980.pdf [firstpage_image] =>[orig_patent_app_number] => 11523576 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/523576
Method of manufacturing semiconductor chip Sep 19, 2006 Issued
Array ( [id] => 5104475 [patent_doc_number] => 20070063350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Semiconductor device and method for designing same' [patent_app_type] => utility [patent_app_number] => 11/522436 [patent_app_country] => US [patent_app_date] => 2006-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2116 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063350.pdf [firstpage_image] =>[orig_patent_app_number] => 11522436 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/522436
Semiconductor device and method for designing same Sep 17, 2006 Issued
Array ( [id] => 4919351 [patent_doc_number] => 20080067663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Wafer level chip package and a method of fabricating thereof' [patent_app_type] => utility [patent_app_number] => 11/522885 [patent_app_country] => US [patent_app_date] => 2006-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4405 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20080067663.pdf [firstpage_image] =>[orig_patent_app_number] => 11522885 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/522885
Wafer level chip package and a method of fabricating thereof Sep 17, 2006 Issued
Array ( [id] => 5552134 [patent_doc_number] => 20090286120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'CASING FOR FUEL BATTERY AND FUEL BATTERY USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/066937 [patent_app_country] => US [patent_app_date] => 2006-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9211 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20090286120.pdf [firstpage_image] =>[orig_patent_app_number] => 12066937 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/066937
Casing for fuel battery and fuel battery using the same Sep 14, 2006 Issued
Array ( [id] => 292333 [patent_doc_number] => 07544623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Method for fabricating a contact hole' [patent_app_type] => utility [patent_app_number] => 11/530886 [patent_app_country] => US [patent_app_date] => 2006-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3096 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/544/07544623.pdf [firstpage_image] =>[orig_patent_app_number] => 11530886 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/530886
Method for fabricating a contact hole Sep 10, 2006 Issued
Array ( [id] => 220951 [patent_doc_number] => 07608497 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-10-27 [patent_title] => 'Passivated tiered gate structure transistor and fabrication method' [patent_app_type] => utility [patent_app_number] => 11/517685 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 6331 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608497.pdf [firstpage_image] =>[orig_patent_app_number] => 11517685 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/517685
Passivated tiered gate structure transistor and fabrication method Sep 7, 2006 Issued
Array ( [id] => 5183103 [patent_doc_number] => 20070054457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Method of fabricating MOS transistor having epitaxial region' [patent_app_type] => utility [patent_app_number] => 11/517246 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4920 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20070054457.pdf [firstpage_image] =>[orig_patent_app_number] => 11517246 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/517246
Method of fabricating MOS transistor having epitaxial region Sep 7, 2006 Issued
Array ( [id] => 142710 [patent_doc_number] => 07687911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Silicon-alloy based barrier layers for integrated circuit metal interconnects' [patent_app_type] => utility [patent_app_number] => 11/517736 [patent_app_country] => US [patent_app_date] => 2006-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8637 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687911.pdf [firstpage_image] =>[orig_patent_app_number] => 11517736 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/517736
Silicon-alloy based barrier layers for integrated circuit metal interconnects Sep 6, 2006 Issued
Array ( [id] => 4768680 [patent_doc_number] => 20080054336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Scalable Electrically Eraseable And Programmable Memory' [patent_app_type] => utility [patent_app_number] => 11/470245 [patent_app_country] => US [patent_app_date] => 2006-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4703 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054336.pdf [firstpage_image] =>[orig_patent_app_number] => 11470245 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/470245
Scalable electrically eraseable and programmable memory Sep 4, 2006 Issued
Array ( [id] => 270848 [patent_doc_number] => 07564084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'Dual-gate dynamic random access memory device having vertical channel transistors and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/513945 [patent_app_country] => US [patent_app_date] => 2006-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 40 [patent_no_of_words] => 7111 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/564/07564084.pdf [firstpage_image] =>[orig_patent_app_number] => 11513945 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/513945
Dual-gate dynamic random access memory device having vertical channel transistors and method of fabricating the same Aug 30, 2006 Issued
Array ( [id] => 7597737 [patent_doc_number] => 07618840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof' [patent_app_type] => utility [patent_app_number] => 11/468153 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3236 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/618/07618840.pdf [firstpage_image] =>[orig_patent_app_number] => 11468153 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468153
Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof Aug 28, 2006 Issued
Array ( [id] => 5145630 [patent_doc_number] => 20070045684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Image sensor and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/508956 [patent_app_country] => US [patent_app_date] => 2006-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2010 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20070045684.pdf [firstpage_image] =>[orig_patent_app_number] => 11508956 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/508956
Image sensor and method for fabricating the same Aug 23, 2006 Issued
Array ( [id] => 5730277 [patent_doc_number] => 20060255391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'METHOD OF FORMING A RELIABLE HIGH PERFORMANCE CAPACITOR USING AN ISOTROPIC ETCHING PROCESS' [patent_app_type] => utility [patent_app_number] => 11/459595 [patent_app_country] => US [patent_app_date] => 2006-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2297 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20060255391.pdf [firstpage_image] =>[orig_patent_app_number] => 11459595 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459595
METHOD OF FORMING A RELIABLE HIGH PERFORMANCE CAPACITOR USING AN ISOTROPIC ETCHING PROCESS Jul 23, 2006 Abandoned
Array ( [id] => 5205157 [patent_doc_number] => 20070026639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/488890 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4894 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20070026639.pdf [firstpage_image] =>[orig_patent_app_number] => 11488890 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488890
Manufacturing method of semiconductor device Jul 18, 2006 Issued
Array ( [id] => 5661613 [patent_doc_number] => 20060252209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Semiconductor memory integrated circuit and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/484743 [patent_app_country] => US [patent_app_date] => 2006-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 8647 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20060252209.pdf [firstpage_image] =>[orig_patent_app_number] => 11484743 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/484743
Semiconductor memory integrated circuit and its manufacturing method Jul 11, 2006 Abandoned
Array ( [id] => 23667 [patent_doc_number] => 07795129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment' [patent_app_type] => utility [patent_app_number] => 11/456354 [patent_app_country] => US [patent_app_date] => 2006-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4875 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795129.pdf [firstpage_image] =>[orig_patent_app_number] => 11456354 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/456354
Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment Jul 9, 2006 Issued
Array ( [id] => 356593 [patent_doc_number] => 07489031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-10 [patent_title] => 'High power radiation emitter device and heat dissipating package for electronic components' [patent_app_type] => utility [patent_app_number] => 11/426761 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 13377 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/489/07489031.pdf [firstpage_image] =>[orig_patent_app_number] => 11426761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/426761
High power radiation emitter device and heat dissipating package for electronic components Jun 26, 2006 Issued
Array ( [id] => 4843205 [patent_doc_number] => 20080179613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Silicon Deflector on a Silicon Submount For Light Emitting Diodes' [patent_app_type] => utility [patent_app_number] => 11/915629 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2963 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20080179613.pdf [firstpage_image] =>[orig_patent_app_number] => 11915629 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/915629
Silicon Deflector on a Silicon Submount For Light Emitting Diodes May 30, 2006 Abandoned
Array ( [id] => 337962 [patent_doc_number] => 07504303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Trench-gate field effect transistors and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 11/441386 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 31 [patent_no_of_words] => 4579 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/504/07504303.pdf [firstpage_image] =>[orig_patent_app_number] => 11441386 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/441386
Trench-gate field effect transistors and methods of forming the same May 23, 2006 Issued
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