Search

John D. Lee

Examiner (ID: 17114)

Most Active Art Unit
2501
Art Unit(s)
2874, 2606, 2507, 2501, 2504, 3621
Total Applications
2783
Issued Applications
2467
Pending Applications
118
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 274614 [patent_doc_number] => 07560780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-14 [patent_title] => 'Active region spacer for semiconductor devices and method to form the same' [patent_app_type] => utility [patent_app_number] => 11/298095 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 5862 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/560/07560780.pdf [firstpage_image] =>[orig_patent_app_number] => 11298095 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/298095
Active region spacer for semiconductor devices and method to form the same Dec 7, 2005 Issued
Array ( [id] => 5810884 [patent_doc_number] => 20060081992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Semiconductor device with a fluorinated silicate glass film as an interlayer metal dielectric film, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/291994 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7692 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081992.pdf [firstpage_image] =>[orig_patent_app_number] => 11291994 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/291994
Semiconductor device with a fluorinated silicate glass film as an interlayer metal dielectric film, and manufacturing method thereof Dec 1, 2005 Abandoned
Array ( [id] => 5810776 [patent_doc_number] => 20060081884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Semiconductor constructions' [patent_app_type] => utility [patent_app_number] => 11/285424 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8722 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081884.pdf [firstpage_image] =>[orig_patent_app_number] => 11285424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/285424
Semiconductor constructions Nov 21, 2005 Issued
Array ( [id] => 5655959 [patent_doc_number] => 20060141695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Methods of forming thin layers including zirconium hafnium oxide and methods of forming gate structures, capacitors, and flash memory devices using the same' [patent_app_type] => utility [patent_app_number] => 11/285555 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5607 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20060141695.pdf [firstpage_image] =>[orig_patent_app_number] => 11285555 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/285555
Methods of forming thin layers including zirconium hafnium oxide and methods of forming gate structures, capacitors, and flash memory devices using the same Nov 21, 2005 Issued
Array ( [id] => 5614054 [patent_doc_number] => 20060115982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/283965 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7368 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20060115982.pdf [firstpage_image] =>[orig_patent_app_number] => 11283965 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/283965
Method for manufacturing semiconductor device Nov 21, 2005 Issued
Array ( [id] => 5593935 [patent_doc_number] => 20060157851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/287136 [patent_app_country] => US [patent_app_date] => 2005-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11073 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157851.pdf [firstpage_image] =>[orig_patent_app_number] => 11287136 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/287136
Semiconductor device and method for manufacturing the same Nov 21, 2005 Abandoned
Array ( [id] => 5747928 [patent_doc_number] => 20060110859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Electronic device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 11/281476 [patent_app_country] => US [patent_app_date] => 2005-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13715 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20060110859.pdf [firstpage_image] =>[orig_patent_app_number] => 11281476 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/281476
Electronic device and manufacturing method of the same Nov 17, 2005 Issued
Array ( [id] => 852959 [patent_doc_number] => 07378343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Dual damascence process utilizing teos-based silicon oxide cap layer having reduced carbon content' [patent_app_type] => utility [patent_app_number] => 11/164285 [patent_app_country] => US [patent_app_date] => 2005-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/378/07378343.pdf [firstpage_image] =>[orig_patent_app_number] => 11164285 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164285
Dual damascence process utilizing teos-based silicon oxide cap layer having reduced carbon content Nov 16, 2005 Issued
Array ( [id] => 243294 [patent_doc_number] => 07589028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-09-15 [patent_title] => 'Hydroxyl bond removal and film densification method for oxide films using microwave post treatment' [patent_app_type] => utility [patent_app_number] => 11/280076 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5881 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/589/07589028.pdf [firstpage_image] =>[orig_patent_app_number] => 11280076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280076
Hydroxyl bond removal and film densification method for oxide films using microwave post treatment Nov 14, 2005 Issued
Array ( [id] => 5242462 [patent_doc_number] => 20070020957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Method of forming an insulating film, method of manufacturing a semiconductor device, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/270536 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3777 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020957.pdf [firstpage_image] =>[orig_patent_app_number] => 11270536 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270536
Method of forming an insulating film, method of manufacturing a semiconductor device, and semiconductor device Nov 9, 2005 Issued
Array ( [id] => 260001 [patent_doc_number] => 07572726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Method of forming a bond pad on an I/C chip and resulting structure' [patent_app_type] => utility [patent_app_number] => 11/271760 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1770 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/572/07572726.pdf [firstpage_image] =>[orig_patent_app_number] => 11271760 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/271760
Method of forming a bond pad on an I/C chip and resulting structure Nov 9, 2005 Issued
Array ( [id] => 5213694 [patent_doc_number] => 20070102774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'GATE STRUCTURE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/164025 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20070102774.pdf [firstpage_image] =>[orig_patent_app_number] => 11164025 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/164025
Method of fabricating gate structure Nov 7, 2005 Issued
Array ( [id] => 5611708 [patent_doc_number] => 20060113634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Bipolar junction transistor with improved extrinsic base region and method of fabrication' [patent_app_type] => utility [patent_app_number] => 11/269477 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2075 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20060113634.pdf [firstpage_image] =>[orig_patent_app_number] => 11269477 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/269477
Bipolar junction transistor with improved extrinsic base region and method of fabrication Nov 6, 2005 Abandoned
Array ( [id] => 239500 [patent_doc_number] => 07592217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Capacitor with zirconium oxide and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/268855 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 9258 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/592/07592217.pdf [firstpage_image] =>[orig_patent_app_number] => 11268855 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268855
Capacitor with zirconium oxide and method for fabricating the same Nov 6, 2005 Issued
Array ( [id] => 5710552 [patent_doc_number] => 20060051897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-09 [patent_title] => 'Technique for attaching die to leads' [patent_app_type] => utility [patent_app_number] => 11/260441 [patent_app_country] => US [patent_app_date] => 2005-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4652 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20060051897.pdf [firstpage_image] =>[orig_patent_app_number] => 11260441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/260441
Technique for attaching die to leads Oct 26, 2005 Issued
Array ( [id] => 645210 [patent_doc_number] => 07118963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Semiconductor memory integrated circuit and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/258193 [patent_app_country] => US [patent_app_date] => 2005-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 8650 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/118/07118963.pdf [firstpage_image] =>[orig_patent_app_number] => 11258193 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/258193
Semiconductor memory integrated circuit and its manufacturing method Oct 25, 2005 Issued
Array ( [id] => 5588721 [patent_doc_number] => 20060038172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Apparatus and methods for wafer-level testing of the chip-scale semiconductor device packages' [patent_app_type] => utility [patent_app_number] => 11/249538 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20060038172.pdf [firstpage_image] =>[orig_patent_app_number] => 11249538 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/249538
Apparatus and methods for wafer-level testing of the chip-scale semiconductor device packages Oct 12, 2005 Abandoned
Array ( [id] => 865569 [patent_doc_number] => 07368812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Interposers for chip-scale packages and intermediates thereof' [patent_app_type] => utility [patent_app_number] => 11/249540 [patent_app_country] => US [patent_app_date] => 2005-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 8556 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368812.pdf [firstpage_image] =>[orig_patent_app_number] => 11249540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/249540
Interposers for chip-scale packages and intermediates thereof Oct 12, 2005 Issued
Array ( [id] => 5747985 [patent_doc_number] => 20060110917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Method of metallization in the fabrication of integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 11/163055 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3319 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20060110917.pdf [firstpage_image] =>[orig_patent_app_number] => 11163055 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/163055
Method of metallization in the fabrication of integrated circuit devices Oct 2, 2005 Abandoned
Array ( [id] => 285458 [patent_doc_number] => 07550385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Amine-free deposition of metal-nitride films' [patent_app_type] => utility [patent_app_number] => 11/240005 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5104 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550385.pdf [firstpage_image] =>[orig_patent_app_number] => 11240005 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240005
Amine-free deposition of metal-nitride films Sep 29, 2005 Issued
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