
John D. Lee
Examiner (ID: 17114)
| Most Active Art Unit | 2501 |
| Art Unit(s) | 2874, 2606, 2507, 2501, 2504, 3621 |
| Total Applications | 2783 |
| Issued Applications | 2467 |
| Pending Applications | 118 |
| Abandoned Applications | 198 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1550426
[patent_doc_number] => 06399475
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[patent_kind] => B1
[patent_issue_date] => 2002-06-04
[patent_title] => 'Process for producing electrical connections on the surface of a semiconductor package with electrical-connection drops'
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[patent_app_number] => 09/679465
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[pdf_file] => patents/06/399/06399475.pdf
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Array
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[patent_issue_date] => 2004-06-29
[patent_title] => 'Method of forming contact openings'
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Array
(
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[patent_issue_date] => 2003-02-11
[patent_title] => 'Method for forming a field effect transistor having increased breakdown voltage'
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Array
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[patent_title] => 'Method of forming self aligned contacts'
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Array
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[patent_title] => 'Method of forming a semiconductor device using CMP to polish a metal film'
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Array
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[patent_title] => 'Passivation of semiconductor device surfaces using an iodine/ethanol solution'
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[patent_title] => 'Devices containing platinum-iridium films and methods of preparing such films and devices'
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Array
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[patent_title] => 'Methods of fabricating semiconductor substrate-based BGA interconnection'
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Array
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[patent_title] => 'Package having terminated plating layer and its manufacturing method'
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Array
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Array
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[patent_title] => 'Via RC improvement for copper damascene and beyond technology'
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Array
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Array
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Array
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