Application number | Title of the application | Filing Date | Status |
---|
08/542336 | CMOS OUTPUT BUFFER CIRCUIT WHICH CONVERTS CMOS LOGIC SIGNALS TO ECL LOGIC SIGNALS AND WHICH DISCHARGES PARASITIC LOAD CAPACITANCES | Oct 11, 1995 | Abandoned |
08/542366 | LOGIC GATE HAVING TRANSMISSION GATE FOR ELECTRICALLY CONFIGURABLE DEVICE MULTIPLEXER | Oct 11, 1995 | Abandoned |
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08/536267 | TRISTATABLE OUTPUT DRIVER FOR USE WITH 3.3 OR 5 VOLT CMOS LOGIC | Sep 28, 1995 | Abandoned |
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Array
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Array
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[patent_doc_number] => 05729155
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[patent_kind] => NA
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Array
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[id] => 3688009
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[patent_kind] => NA
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08/523068 | OUTPUT BUFFER INCORPORATING SHARED INTERMEDIATE NODES | Aug 31, 1995 | Abandoned |
Array
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Array
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08/512959 | BICMOS TRI-STATE BUFFER WITH LOW LEAKAGE CURRENT | Aug 8, 1995 | Abandoned |
08/508277 | DEDICATED WIDE EXCLUSIVE OR FOR PLDS | Jul 26, 1995 | Abandoned |
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