Search

John Douglas Smith

Examiner (ID: 12554)

Most Active Art Unit
1502
Art Unit(s)
1502, 2605
Total Applications
552
Issued Applications
478
Pending Applications
0
Abandoned Applications
74

Applications

Application numberTitle of the applicationFiling DateStatus
06/501295 PROCESS FOR PREPARING PRINTED CIRCUIT BOARD THRU-HOLES Jun 5, 1983 Abandoned
Array ( [id] => 2198292 [patent_doc_number] => 04503134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-05 [patent_title] => 'Method of modifying surface of colored micro-filter element' [patent_app_type] => 1 [patent_app_number] => 6/498103 [patent_app_country] => US [patent_app_date] => 1983-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3952 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/503/04503134.pdf [firstpage_image] =>[orig_patent_app_number] => 498103 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/498103
Method of modifying surface of colored micro-filter element May 24, 1983 Issued
Array ( [id] => 2280198 [patent_doc_number] => 04619840 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-28 [patent_title] => 'Process and apparatus for low pressure chemical vapor deposition of refractory metal' [patent_app_type] => 1 [patent_app_number] => 6/497321 [patent_app_country] => US [patent_app_date] => 1983-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4953 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/619/04619840.pdf [firstpage_image] =>[orig_patent_app_number] => 497321 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/497321
Process and apparatus for low pressure chemical vapor deposition of refractory metal May 22, 1983 Issued
Array ( [id] => 2192689 [patent_doc_number] => 04511601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-16 [patent_title] => 'Copper metallization for dielectric materials' [patent_app_type] => 1 [patent_app_number] => 6/494475 [patent_app_country] => US [patent_app_date] => 1983-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3310 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/511/04511601.pdf [firstpage_image] =>[orig_patent_app_number] => 494475 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/494475
Copper metallization for dielectric materials May 12, 1983 Issued
Array ( [id] => 2159359 [patent_doc_number] => 04500368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-02-19 [patent_title] => 'Ag/Pd electroding powder and method for making' [patent_app_type] => 1 [patent_app_number] => 6/493863 [patent_app_country] => US [patent_app_date] => 1983-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 21 [patent_no_of_words] => 4070 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/500/04500368.pdf [firstpage_image] =>[orig_patent_app_number] => 493863 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/493863
Ag/Pd electroding powder and method for making May 11, 1983 Issued
Array ( [id] => 2072231 [patent_doc_number] => 04470883 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-09-11 [patent_title] => 'Additive printed circuit process' [patent_app_type] => 1 [patent_app_number] => 6/490280 [patent_app_country] => US [patent_app_date] => 1983-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5136 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/470/04470883.pdf [firstpage_image] =>[orig_patent_app_number] => 490280 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/490280
Additive printed circuit process May 1, 1983 Issued
Array ( [id] => 2153319 [patent_doc_number] => 04517225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-05-14 [patent_title] => 'Method for manufacturing an electrical interconnection by selective tungsten deposition' [patent_app_type] => 1 [patent_app_number] => 6/490381 [patent_app_country] => US [patent_app_date] => 1983-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 4640 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/517/04517225.pdf [firstpage_image] =>[orig_patent_app_number] => 490381 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/490381
Method for manufacturing an electrical interconnection by selective tungsten deposition May 1, 1983 Issued
Array ( [id] => 2174742 [patent_doc_number] => 04529477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-07-16 [patent_title] => 'Process for the manufacture of printed circuit boards' [patent_app_type] => 1 [patent_app_number] => 6/490344 [patent_app_country] => US [patent_app_date] => 1983-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1934 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/529/04529477.pdf [firstpage_image] =>[orig_patent_app_number] => 490344 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/490344
Process for the manufacture of printed circuit boards May 1, 1983 Issued
Array ( [id] => 2121425 [patent_doc_number] => 04481236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-06 [patent_title] => 'Life extension of catalyst predip baths' [patent_app_type] => 1 [patent_app_number] => 6/490313 [patent_app_country] => US [patent_app_date] => 1983-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2423 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/481/04481236.pdf [firstpage_image] =>[orig_patent_app_number] => 490313 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/490313
Life extension of catalyst predip baths May 1, 1983 Issued
Array ( [id] => 2119154 [patent_doc_number] => 04448801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-15 [patent_title] => 'Process for forming deposition film' [patent_app_type] => 1 [patent_app_number] => 6/487718 [patent_app_country] => US [patent_app_date] => 1983-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3036 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/448/04448801.pdf [firstpage_image] =>[orig_patent_app_number] => 487718 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/487718
Process for forming deposition film Apr 28, 1983 Issued
Array ( [id] => 2100489 [patent_doc_number] => 04457952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-03 [patent_title] => 'Process for producing printed circuit boards' [patent_app_type] => 1 [patent_app_number] => 6/485399 [patent_app_country] => US [patent_app_date] => 1983-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 4329 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/457/04457952.pdf [firstpage_image] =>[orig_patent_app_number] => 485399 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/485399
Process for producing printed circuit boards Apr 14, 1983 Issued
Array ( [id] => 2147816 [patent_doc_number] => 04497890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-02-05 [patent_title] => 'Process for improving adhesion of resist to gold' [patent_app_type] => 1 [patent_app_number] => 6/483088 [patent_app_country] => US [patent_app_date] => 1983-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2520 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/497/04497890.pdf [firstpage_image] =>[orig_patent_app_number] => 483088 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/483088
Process for improving adhesion of resist to gold Apr 7, 1983 Issued
Array ( [id] => 2105165 [patent_doc_number] => 04442377 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-04-10 [patent_title] => 'Phosphors' [patent_app_type] => 1 [patent_app_number] => 6/474059 [patent_app_country] => US [patent_app_date] => 1983-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1383 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/442/04442377.pdf [firstpage_image] =>[orig_patent_app_number] => 474059 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/474059
Phosphors Mar 9, 1983 Issued
Array ( [id] => 2159227 [patent_doc_number] => 04521448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-06-04 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 6/471651 [patent_app_country] => US [patent_app_date] => 1983-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 6952 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/521/04521448.pdf [firstpage_image] =>[orig_patent_app_number] => 471651 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/471651
Method of manufacturing semiconductor device Mar 2, 1983 Issued
Array ( [id] => 2192667 [patent_doc_number] => 04511599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-16 [patent_title] => 'Mask for vacuum depositing back metal electrodes on EL panel' [patent_app_type] => 1 [patent_app_number] => 6/470935 [patent_app_country] => US [patent_app_date] => 1983-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3489 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/511/04511599.pdf [firstpage_image] =>[orig_patent_app_number] => 470935 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/470935
Mask for vacuum depositing back metal electrodes on EL panel Feb 28, 1983 Issued
Array ( [id] => 2158049 [patent_doc_number] => 04510178 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-09 [patent_title] => 'Thin film resistor material and method' [patent_app_type] => 1 [patent_app_number] => 6/466234 [patent_app_country] => US [patent_app_date] => 1983-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5963 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/510/04510178.pdf [firstpage_image] =>[orig_patent_app_number] => 466234 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/466234
Thin film resistor material and method Feb 13, 1983 Issued
Array ( [id] => 2086473 [patent_doc_number] => 04465705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-08-14 [patent_title] => 'Method of making semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 6/466142 [patent_app_country] => US [patent_app_date] => 1983-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 5094 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/465/04465705.pdf [firstpage_image] =>[orig_patent_app_number] => 466142 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/466142
Method of making semiconductor devices Feb 13, 1983 Issued
Array ( [id] => 2106259 [patent_doc_number] => 04473597 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-09-25 [patent_title] => 'Method and structure for passivating a PN junction' [patent_app_type] => 1 [patent_app_number] => 6/463166 [patent_app_country] => US [patent_app_date] => 1983-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2049 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/473/04473597.pdf [firstpage_image] =>[orig_patent_app_number] => 463166 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/463166
Method and structure for passivating a PN junction Feb 1, 1983 Issued
Array ( [id] => 2100583 [patent_doc_number] => 04428975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-01-31 [patent_title] => 'Process for improving nitride deposition on a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 6/461715 [patent_app_country] => US [patent_app_date] => 1983-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2149 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/428/04428975.pdf [firstpage_image] =>[orig_patent_app_number] => 461715 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/461715
Process for improving nitride deposition on a semiconductor wafer Jan 27, 1983 Issued
Array ( [id] => 2132910 [patent_doc_number] => 04454528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-12 [patent_title] => 'Low resistance backside preparation for semiconductor integrated circuit chips' [patent_app_type] => 1 [patent_app_number] => 6/460556 [patent_app_country] => US [patent_app_date] => 1983-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1141 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/454/04454528.pdf [firstpage_image] =>[orig_patent_app_number] => 460556 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/460556
Low resistance backside preparation for semiconductor integrated circuit chips Jan 23, 1983 Issued
Menu