John E. Barlow Jr.

Array ( [id] => 17886544 [patent_doc_number] => 20220302022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR SUBSTRATE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/204829 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18593408 [patent_doc_number] => 11742320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Wafer bonding alignment [patent_app_type] => utility [patent_app_number] => 17/249758 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 23967 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16981821 [patent_doc_number] => 20210226058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => NANOWIRE SEMICONDUCTOR DEVICE HAVING HIGH-QUALITY EPITAXIAL LAYER AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/197930 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19046706 [patent_doc_number] => 11935826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Capacitor between two passivation layers with different etching rates [patent_app_type] => utility [patent_app_number] => 17/197483 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17917709 [patent_doc_number] => 20220320105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 17/310645 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17310645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18840164 [patent_doc_number] => 11848243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Molded semiconductor package having a substrate with bevelled edge [patent_app_type] => utility [patent_app_number] => 17/193737 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5768 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17653653 [patent_doc_number] => 11356404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Domain name system (DNS) override for edge computing [patent_app_type] => utility [patent_app_number] => 17/189796 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11292 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18857284 [patent_doc_number] => 11854879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Cu [patent_app_type] => utility [patent_app_number] => 17/184756 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 10827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184756 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17146386 [patent_doc_number] => 20210314399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => METHOD AND APPARATUS FOR RECOVERING MISSING DATA IN MULTI-SOURCE HYBRID OVERLAY NETWORK [patent_app_type] => utility [patent_app_number] => 17/185413 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18382085 [patent_doc_number] => 20230157176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => DISPLAYING SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/432433 [patent_app_country] => US [patent_app_date] => 2021-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17432433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18121619 [patent_doc_number] => 11553023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Abstraction layer for streaming data sources [patent_app_type] => utility [patent_app_number] => 17/180818 [patent_app_country] => US [patent_app_date] => 2021-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17180818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18343920 [patent_doc_number] => 11641407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Methods and systems for implementing communications between a management controller and a network controller via an NC-SI that utilizes IP connectivity [patent_app_type] => utility [patent_app_number] => 17/179306 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8697 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17179306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17055748 [patent_doc_number] => 20210265182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => HYBRID PANEL METHOD OF MANUFACTURING ELECTRONIC DEVICES AND ELECTRONIC DEVICES MANUFACTURED THEREBY [patent_app_type] => utility [patent_app_number] => 17/176039 [patent_app_country] => US [patent_app_date] => 2021-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18230115 [patent_doc_number] => 20230069109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => METAL OXIDE, METHOD FOR FORMING METAL OXIDE, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/797189 [patent_app_country] => US [patent_app_date] => 2021-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 63124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17797189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18361286 [patent_doc_number] => 20230142877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/920484 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17920484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17010873 [patent_doc_number] => 20210242034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => SINTERING METHOD USING A SACRIFICIAL LAYER ON THE BACKSIDE METALLIZATION OF A SEMICONDUCTOR DIE [patent_app_type] => utility [patent_app_number] => 17/167620 [patent_app_country] => US [patent_app_date] => 2021-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18248956 [patent_doc_number] => 11605552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Hybrid panel method of manufacturing electronic devices and electronic devices manufactured thereby [patent_app_type] => utility [patent_app_number] => 17/165303 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 15977 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18292511 [patent_doc_number] => 11621384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Light-emitting device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/165886 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 9977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17040620 [patent_doc_number] => 20210257256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => WAFER PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/163836 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18371792 [patent_doc_number] => 11651974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Semiconductor package and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/161818 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 2937 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161818 [rel_patent_id] =>[rel_patent_doc_number] =>)