Search

John E. Barlow Jr.

Supervisory Patent Examiner (ID: 10238, Phone: (571)272-2269 , Office: P/2800 )

Most Active Art Unit
2108
Art Unit(s)
2105, 2600, 2800, 2863, 2108, 2853, 2857
Total Applications
691
Issued Applications
547
Pending Applications
31
Abandoned Applications
124

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19758188 [patent_doc_number] => 20250046753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/363096 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363096
INTEGRATED CIRCUIT PACKAGE AND METHOD Jul 31, 2023 Pending
Array ( [id] => 18789308 [patent_doc_number] => 20230377959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => IN-SITU CMP SELF-ASSEMBLED MONOLAYER FOR ENHANCING METAL-DIELECTRIC ADHESION AND PREVENTING METAL DIFFUSION [patent_app_type] => utility [patent_app_number] => 18/362797 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362797
In-situ CMP self-assembled monolayer for enhancing metal-dielectric adhesion and preventing metal diffusion Jul 30, 2023 Issued
Array ( [id] => 19428387 [patent_doc_number] => 12087824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Composite oxide semiconductor and transistor [patent_app_type] => utility [patent_app_number] => 18/228134 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 105 [patent_no_of_words] => 27319 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228134 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228134
Composite oxide semiconductor and transistor Jul 30, 2023 Issued
Array ( [id] => 19758168 [patent_doc_number] => 20250046733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR DEVICE AND PROCESS WITH CRACK REDUCTION [patent_app_type] => utility [patent_app_number] => 18/362894 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362894 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362894
SEMICONDUCTOR DEVICE AND PROCESS WITH CRACK REDUCTION Jul 30, 2023 Pending
Array ( [id] => 19781651 [patent_doc_number] => 12230690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Method of forming a high electron mobility transistor [patent_app_type] => utility [patent_app_number] => 18/360694 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360694 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360694
Method of forming a high electron mobility transistor Jul 26, 2023 Issued
Array ( [id] => 19749527 [patent_doc_number] => 20250038092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICE WITH HYBRID ROUTING AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/360208 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360208 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360208
SEMICONDUCTOR DEVICE WITH HYBRID ROUTING AND METHOD THEREFOR Jul 26, 2023 Pending
Array ( [id] => 19951352 [patent_doc_number] => 12322723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Self-aligned interconnect structure [patent_app_type] => utility [patent_app_number] => 18/359012 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 33 [patent_no_of_words] => 3319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359012
Self-aligned interconnect structure Jul 25, 2023 Issued
Array ( [id] => 19486652 [patent_doc_number] => 20240334694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/358627 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358627 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358627
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE Jul 24, 2023 Pending
Array ( [id] => 18774417 [patent_doc_number] => 20230369248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR DEVICE PACKAGING WARPAGE CONTROL [patent_app_type] => utility [patent_app_number] => 18/358195 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358195
SEMICONDUCTOR DEVICE PACKAGING WARPAGE CONTROL Jul 24, 2023 Pending
Array ( [id] => 18757566 [patent_doc_number] => 20230361029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/224209 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224209 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224209
Interconnection structure and methods of forming the same Jul 19, 2023 Issued
Array ( [id] => 19906549 [patent_doc_number] => 12283568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Wafer bonding alignment [patent_app_type] => utility [patent_app_number] => 18/347067 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 18731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347067 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347067
Wafer bonding alignment Jul 4, 2023 Issued
Array ( [id] => 20259058 [patent_doc_number] => 12431423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Method for low-cost, high-bandwidth monolithic system integration beyond reticle limit [patent_app_type] => utility [patent_app_number] => 18/217223 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 37 [patent_no_of_words] => 3542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18217223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/217223
Method for low-cost, high-bandwidth monolithic system integration beyond reticle limit Jun 29, 2023 Issued
Array ( [id] => 19688048 [patent_doc_number] => 20250006593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SUBSTRATE CONTACT INTEGRATION IN GALLIUM NITRIDE DEVICES [patent_app_type] => utility [patent_app_number] => 18/345939 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345939 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/345939
SUBSTRATE CONTACT INTEGRATION IN GALLIUM NITRIDE DEVICES Jun 29, 2023 Pending
Array ( [id] => 19688113 [patent_doc_number] => 20250006658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => Three Dimensional Crackstop Interweave Architectural Design Using Supervia. [patent_app_type] => utility [patent_app_number] => 18/216328 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216328 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216328
Three Dimensional Crackstop Interweave Architectural Design Using Supervia. Jun 28, 2023 Pending
Array ( [id] => 19589861 [patent_doc_number] => 20240387418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/209486 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209486 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/209486
SEMICONDUCTOR DEVICE Jun 13, 2023 Pending
Array ( [id] => 18821112 [patent_doc_number] => 20230395453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/206598 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18206598 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/206598
CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME Jun 5, 2023 Pending
Array ( [id] => 19733706 [patent_doc_number] => 12211707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Integrated circuit package and method of forming thereof [patent_app_type] => utility [patent_app_number] => 18/329302 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 10474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18329302 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/329302
Integrated circuit package and method of forming thereof Jun 4, 2023 Issued
Array ( [id] => 19452795 [patent_doc_number] => 20240312925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE, FABRICATING METHOD, MEMORY DEVICE AND DEVICE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/204039 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204039 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/204039
SEMICONDUCTOR DEVICE, FABRICATING METHOD, MEMORY DEVICE AND DEVICE SYSTEM May 30, 2023 Pending
Array ( [id] => 19740798 [patent_doc_number] => 12217636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Stretchable display device [patent_app_type] => utility [patent_app_number] => 18/322462 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 22623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322462 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/322462
Stretchable display device May 22, 2023 Issued
Array ( [id] => 19364268 [patent_doc_number] => 20240266302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => CARRIER SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/319591 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319591 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319591
CARRIER SUBSTRATE May 17, 2023 Pending
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