
John E. Barlow Jr.
Supervisory Patent Examiner (ID: 10238, Phone: (571)272-2269 , Office: P/2800 )
| Most Active Art Unit | 2108 |
| Art Unit(s) | 2105, 2600, 2800, 2863, 2108, 2853, 2857 |
| Total Applications | 691 |
| Issued Applications | 547 |
| Pending Applications | 31 |
| Abandoned Applications | 124 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18600236
[patent_doc_number] => 20230275037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => SEMICONDUCTOR SUBSTRATE AND METHOD OF SAWING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/144902
[patent_app_country] => US
[patent_app_date] => 2023-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4768
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144902
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/144902 | Semiconductor substrate and method of sawing the same | May 8, 2023 | Issued |
Array
(
[id] => 20416800
[patent_doc_number] => 12500093
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-16
[patent_title] => Composite particulates for use as part of a supporting fill mixture in a semicondutor substrate stacking application
[patent_app_type] => utility
[patent_app_number] => 18/308036
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5273
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308036
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/308036 | Composite particulates for use as part of a supporting fill mixture in a semicondutor substrate stacking application | Apr 26, 2023 | Issued |
Array
(
[id] => 19546377
[patent_doc_number] => 20240363413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => LASER DICING TO CONTROL SPLASH
[patent_app_type] => utility
[patent_app_number] => 18/308303
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5157
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308303
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/308303 | LASER DICING TO CONTROL SPLASH | Apr 26, 2023 | Pending |
Array
(
[id] => 19980244
[patent_doc_number] => 12347732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Systems and methods for mitigating crack propagation in semiconductor die manufacturing
[patent_app_type] => utility
[patent_app_number] => 18/306137
[patent_app_country] => US
[patent_app_date] => 2023-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 22
[patent_no_of_words] => 1085
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306137
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/306137 | Systems and methods for mitigating crack propagation in semiconductor die manufacturing | Apr 23, 2023 | Issued |
Array
(
[id] => 18774285
[patent_doc_number] => 20230369116
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => MANUFACTURING METHOD OF CHIPS
[patent_app_type] => utility
[patent_app_number] => 18/299786
[patent_app_country] => US
[patent_app_date] => 2023-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5064
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299786
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/299786 | MANUFACTURING METHOD OF CHIPS | Apr 12, 2023 | Pending |
Array
(
[id] => 18679884
[patent_doc_number] => 20230317542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => SEMICONDUCTOR DEVICE COMPRISING CONTACT PAD STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/128506
[patent_app_country] => US
[patent_app_date] => 2023-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5539
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128506
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/128506 | SEMICONDUCTOR DEVICE COMPRISING CONTACT PAD STRUCTURE | Mar 29, 2023 | Pending |
Array
(
[id] => 18874760
[patent_doc_number] => 11862583
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Semiconductor wafer thinned by stealth lasing
[patent_app_type] => utility
[patent_app_number] => 18/128622
[patent_app_country] => US
[patent_app_date] => 2023-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3692
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128622
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/128622 | Semiconductor wafer thinned by stealth lasing | Mar 29, 2023 | Issued |
Array
(
[id] => 19484134
[patent_doc_number] => 20240332176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => Semiconductor Packages and Methods of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 18/192521
[patent_app_country] => US
[patent_app_date] => 2023-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13405
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192521
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/192521 | Semiconductor Packages and Methods of Forming the Same | Mar 28, 2023 | Pending |
Array
(
[id] => 19972490
[patent_doc_number] => 12341111
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Crackstop structures
[patent_app_type] => utility
[patent_app_number] => 18/127203
[patent_app_country] => US
[patent_app_date] => 2023-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18127203
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/127203 | Crackstop structures | Mar 27, 2023 | Issued |
Array
(
[id] => 20389281
[patent_doc_number] => 12489016
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-02
[patent_title] => Integrated circuit packages and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 18/184968
[patent_app_country] => US
[patent_app_date] => 2023-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4539
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184968
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/184968 | Integrated circuit packages and methods of forming the same | Mar 15, 2023 | Issued |
Array
(
[id] => 19384614
[patent_doc_number] => 20240274484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => WAFER-LEVEL-PACKAGE DEVICE WITH PERIPHERAL SIDE WALL PROTECTION
[patent_app_type] => utility
[patent_app_number] => 18/179648
[patent_app_country] => US
[patent_app_date] => 2023-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179648
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/179648 | WAFER-LEVEL-PACKAGE DEVICE WITH PERIPHERAL SIDE WALL PROTECTION | Mar 6, 2023 | Pending |
Array
(
[id] => 18473166
[patent_doc_number] => 20230207454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => METHODS OF FORMING A MICROELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/175398
[patent_app_country] => US
[patent_app_date] => 2023-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14249
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175398
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/175398 | Methods of forming a microelectronic device | Feb 26, 2023 | Issued |
Array
(
[id] => 18456234
[patent_doc_number] => 20230197516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => Chip Package Based On Through-Silicon-Via Connector And Silicon Interconnection Bridge
[patent_app_type] => utility
[patent_app_number] => 18/108587
[patent_app_country] => US
[patent_app_date] => 2023-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 59674
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108587
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/108587 | Chip Package Based On Through-Silicon-Via Connector And Silicon Interconnection Bridge | Feb 10, 2023 | Pending |
Array
(
[id] => 19670875
[patent_doc_number] => 12183646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-31
[patent_title] => Semiconductor device with a dielectric between portions
[patent_app_type] => utility
[patent_app_number] => 18/166922
[patent_app_country] => US
[patent_app_date] => 2023-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 7997
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18166922
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/166922 | Semiconductor device with a dielectric between portions | Feb 8, 2023 | Issued |
Array
(
[id] => 18439992
[patent_doc_number] => 20230187287
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => MAGNETIC PROPERTY MEASURING SYSTEM, A METHOD FOR MEASURING MAGNETIC PROPERTIES, AND A METHOD FOR MANUFACTURING A MAGNETIC MEMORY DEVICE USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/165447
[patent_app_country] => US
[patent_app_date] => 2023-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165447
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/165447 | MAGNETIC PROPERTY MEASURING SYSTEM, A METHOD FOR MEASURING MAGNETIC PROPERTIES, AND A METHOD FOR MANUFACTURING A MAGNETIC MEMORY DEVICE USING THE SAME | Feb 6, 2023 | Pending |
Array
(
[id] => 19444546
[patent_doc_number] => 12094837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Method of manufacturing semiconductor devices by filling grooves formed in a front side surface of a wafer with a side face protection material
[patent_app_type] => utility
[patent_app_number] => 18/106028
[patent_app_country] => US
[patent_app_date] => 2023-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 6359
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106028
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/106028 | Method of manufacturing semiconductor devices by filling grooves formed in a front side surface of a wafer with a side face protection material | Feb 5, 2023 | Issued |
Array
(
[id] => 18951200
[patent_doc_number] => 11894507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-06
[patent_title] => Light-emitting device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 18/164629
[patent_app_country] => US
[patent_app_date] => 2023-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 28
[patent_no_of_words] => 9976
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164629
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/164629 | Light-emitting device and manufacturing method thereof | Feb 5, 2023 | Issued |
Array
(
[id] => 19090148
[patent_doc_number] => 11951571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Method of forming package structure
[patent_app_type] => utility
[patent_app_number] => 18/163338
[patent_app_country] => US
[patent_app_date] => 2023-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 95
[patent_figures_cnt] => 190
[patent_no_of_words] => 18495
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163338
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/163338 | Method of forming package structure | Feb 1, 2023 | Issued |
Array
(
[id] => 18943547
[patent_doc_number] => 20240038686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/103676
[patent_app_country] => US
[patent_app_date] => 2023-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10581
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103676
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/103676 | SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF | Jan 30, 2023 | Pending |
Array
(
[id] => 18350140
[patent_doc_number] => 20230138251
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => THREE-DIMENSIONAL MEMORY AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/089559
[patent_app_country] => US
[patent_app_date] => 2022-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089559
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/089559 | THREE-DIMENSIONAL MEMORY AND FABRICATION METHOD THEREOF | Dec 26, 2022 | Pending |