
John E. Uselding
Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )
| Most Active Art Unit | 1763 |
| Art Unit(s) | 4171, 1796, 1763 |
| Total Applications | 1454 |
| Issued Applications | 729 |
| Pending Applications | 129 |
| Abandoned Applications | 616 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20382493
[patent_doc_number] => 20250364986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-27
[patent_title] => PROGRAMMABLE GATE VOLTAGE FOR ON RESISTANCE CONTROL OF POWER MODULE
[patent_app_type] => utility
[patent_app_number] => 18/672654
[patent_app_country] => US
[patent_app_date] => 2024-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1167
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672654
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/672654 | PROGRAMMABLE GATE VOLTAGE FOR ON RESISTANCE CONTROL OF POWER MODULE | May 22, 2024 | Pending |
Array
(
[id] => 19635372
[patent_doc_number] => 20240413821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => CIRCUIT AND SYSTEM FOR ACCELERATING RECOVERY OF INTEGRATED CIRCUIT AGING
[patent_app_type] => utility
[patent_app_number] => 18/648441
[patent_app_country] => US
[patent_app_date] => 2024-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2276
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/648441 | CIRCUIT AND SYSTEM FOR ACCELERATING RECOVERY OF INTEGRATED CIRCUIT AGING | Apr 27, 2024 | Abandoned |
Array
(
[id] => 20637031
[patent_doc_number] => 12597920
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-07
[patent_title] => Power switch circuit
[patent_app_type] => utility
[patent_app_number] => 18/632238
[patent_app_country] => US
[patent_app_date] => 2024-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 1149
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 289
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632238
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/632238 | Power switch circuit | Apr 9, 2024 | Issued |
Array
(
[id] => 19516563
[patent_doc_number] => 20240348249
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => POWER MOSFET DRIVER CIRCUIT ARRANGEMENT AND CORRESPONDING CONTROL METHOD
[patent_app_type] => utility
[patent_app_number] => 18/630493
[patent_app_country] => US
[patent_app_date] => 2024-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8342
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630493
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/630493 | POWER MOSFET DRIVER CIRCUIT ARRANGEMENT AND CORRESPONDING CONTROL METHOD | Apr 8, 2024 | Issued |
Array
(
[id] => 20284645
[patent_doc_number] => 20250309887
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => CONTROLLING A POWER SWITCHING ELEMENT USING A SENSE SWITCHING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 18/622369
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2100
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622369
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622369 | CONTROLLING A POWER SWITCHING ELEMENT USING A SENSE SWITCHING ELEMENT | Mar 28, 2024 | Pending |
Array
(
[id] => 19286696
[patent_doc_number] => 20240223176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => OPTIMIZATION OF POWER MODULE PERFORMANCE VIA PARASITIC MUTUAL COUPLING
[patent_app_type] => utility
[patent_app_number] => 18/429613
[patent_app_country] => US
[patent_app_date] => 2024-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9433
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429613
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/429613 | Optimization of power module performance via parasitic mutual coupling | Jan 31, 2024 | Issued |
Array
(
[id] => 19576104
[patent_doc_number] => 20240380396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => PRE-CONDITIONING A NODE OF A CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/428442
[patent_app_country] => US
[patent_app_date] => 2024-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9636
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428442
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/428442 | Pre-conditioning a node of a circuit | Jan 30, 2024 | Issued |
Array
(
[id] => 19965402
[patent_doc_number] => 12334926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Duty cycle distortion (DCD) sampling in a low-swing transmitter
[patent_app_type] => utility
[patent_app_number] => 18/398779
[patent_app_country] => US
[patent_app_date] => 2023-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398779
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/398779 | Duty cycle distortion (DCD) sampling in a low-swing transmitter | Dec 27, 2023 | Issued |
Array
(
[id] => 20064248
[patent_doc_number] => 20250202470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => LINEAR OUTPUT DRIVER ARCHITECTURE FOR OPTICAL MODULATORS
[patent_app_type] => utility
[patent_app_number] => 18/539389
[patent_app_country] => US
[patent_app_date] => 2023-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1182
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539389
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/539389 | LINEAR OUTPUT DRIVER ARCHITECTURE FOR OPTICAL MODULATORS | Dec 13, 2023 | Pending |
Array
(
[id] => 20539002
[patent_doc_number] => 12556082
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-17
[patent_title] => Driving circuit of bridge circuit
[patent_app_type] => utility
[patent_app_number] => 18/530608
[patent_app_country] => US
[patent_app_date] => 2023-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5741
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530608
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/530608 | Driving circuit of bridge circuit | Dec 5, 2023 | Issued |
Array
(
[id] => 20045669
[patent_doc_number] => 20250183891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => LINE DRIVERS FOR LOW-VOLTAGE SIGNALING BETWEEN DIFFERENT VOLTAGE DOMAINS
[patent_app_type] => utility
[patent_app_number] => 18/527921
[patent_app_country] => US
[patent_app_date] => 2023-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2246
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527921
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/527921 | LINE DRIVERS FOR LOW-VOLTAGE SIGNALING BETWEEN DIFFERENT VOLTAGE DOMAINS | Dec 3, 2023 | Pending |
Array
(
[id] => 20318413
[patent_doc_number] => 12456971
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-28
[patent_title] => Method and apparatus for limiting minority carrier injection
[patent_app_type] => utility
[patent_app_number] => 18/524664
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 0
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524664
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/524664 | Method and apparatus for limiting minority carrier injection | Nov 29, 2023 | Issued |
Array
(
[id] => 19206935
[patent_doc_number] => 20240178834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => Drive Voltage Generator
[patent_app_type] => utility
[patent_app_number] => 18/522571
[patent_app_country] => US
[patent_app_date] => 2023-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4816
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522571
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/522571 | Drive Voltage Generator | Nov 28, 2023 | Pending |
Array
(
[id] => 20036948
[patent_doc_number] => 20250175170
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-29
[patent_title] => GATE DRIVER WITH INTEGRATED SELF SHORT CIRCUIT DETECTION AND PROTECTION
[patent_app_type] => utility
[patent_app_number] => 18/519439
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11853
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519439
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/519439 | Gate driver with integrated self short circuit detection and protection | Nov 26, 2023 | Issued |
Array
(
[id] => 20204555
[patent_doc_number] => 12407345
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-02
[patent_title] => Switched inductive storage element to enhance gate drive at turn-off
[patent_app_type] => utility
[patent_app_number] => 18/520376
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 40
[patent_no_of_words] => 20271
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520376
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/520376 | Switched inductive storage element to enhance gate drive at turn-off | Nov 26, 2023 | Issued |
Array
(
[id] => 19500985
[patent_doc_number] => 20240340003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => SWITCHING CONTROL
[patent_app_type] => utility
[patent_app_number] => 18/519665
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10719
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519665
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/519665 | SWITCHING CONTROL | Nov 26, 2023 | Pending |
Array
(
[id] => 19206938
[patent_doc_number] => 20240178837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => CONTROL CIRCUIT FOR AN OUTPUT DRIVER WITH A SLEW RATE CONTROL CIRCUIT AND AN OUTPUT DRIVER COMPRISING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/516318
[patent_app_country] => US
[patent_app_date] => 2023-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4406
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 313
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/516318 | CONTROL CIRCUIT FOR AN OUTPUT DRIVER WITH A SLEW RATE CONTROL CIRCUIT AND AN OUTPUT DRIVER COMPRISING THE SAME | Nov 20, 2023 | Pending |
Array
(
[id] => 20360630
[patent_doc_number] => 12476638
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => FPGA-based adjustable clock for audio devices
[patent_app_type] => utility
[patent_app_number] => 18/243920
[patent_app_country] => US
[patent_app_date] => 2023-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1650
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243920
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/243920 | FPGA-based adjustable clock for audio devices | Sep 7, 2023 | Issued |
Array
(
[id] => 19192220
[patent_doc_number] => 20240171133
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => SENSOR DRIVER PROVIDING HIGH POWER SUPPLY REJECTION RATIO
[patent_app_type] => utility
[patent_app_number] => 18/461050
[patent_app_country] => US
[patent_app_date] => 2023-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5208
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461050
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/461050 | SENSOR DRIVER PROVIDING HIGH POWER SUPPLY REJECTION RATIO | Sep 4, 2023 | Pending |
Array
(
[id] => 19039074
[patent_doc_number] => 20240088889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => METHOD FOR DRIVING A TOPOLOGICAL SEMICONDUCTOR SWITCH FOR A POWER ELECTRONICS SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/457574
[patent_app_country] => US
[patent_app_date] => 2023-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2325
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457574
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/457574 | METHOD FOR DRIVING A TOPOLOGICAL SEMICONDUCTOR SWITCH FOR A POWER ELECTRONICS SYSTEM | Aug 28, 2023 | Pending |