
John E. Uselding
Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )
| Most Active Art Unit | 1763 |
| Art Unit(s) | 4171, 1796, 1763 |
| Total Applications | 1454 |
| Issued Applications | 729 |
| Pending Applications | 129 |
| Abandoned Applications | 616 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10053350
[patent_doc_number] => 09093232
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-28
[patent_title] => 'Electronic switch for low-voltage and high switching speed applications'
[patent_app_type] => utility
[patent_app_number] => 13/859195
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Array
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[patent_doc_number] => 20150061752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-05
[patent_title] => 'CASCODE CIRCUIT'
[patent_app_type] => utility
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Array
(
[id] => 9460976
[patent_doc_number] => 20140125402
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[patent_kind] => A1
[patent_issue_date] => 2014-05-08
[patent_title] => 'SWITCHING CIRCUIT, RADIO SWITCHING CIRCUIT, AND SWITCHING METHOD THEREOF'
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[patent_app_number] => 13/803278
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Array
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[patent_doc_number] => 09252764
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[patent_issue_date] => 2016-02-02
[patent_title] => 'Systems and methods for reducing spike voltages in a switched output stage'
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Array
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Array
(
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[patent_title] => 'LOW VOLTAGE ANTIFUSE PROGRAMMING CIRCUIT AND METHOD'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/775672 | Low voltage antifuse programming circuit and method | Feb 24, 2013 | Issued |
Array
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[patent_doc_number] => 09900003
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[patent_issue_date] => 2018-02-20
[patent_title] => 'High voltage current switch circuit'
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Array
(
[id] => 9601183
[patent_doc_number] => 20140197865
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'ON-CHIP RANDOMNESS GENERATION'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/739151 | ON-CHIP RANDOMNESS GENERATION | Jan 10, 2013 | Abandoned |
Array
(
[id] => 8881532
[patent_doc_number] => 20130154716
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'Circuit Topology for a Phase Connection of an Inverter'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/686089 | Circuit topology for a phase connection of an inverter | Nov 26, 2012 | Issued |
Array
(
[id] => 8789500
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[patent_issue_date] => 2013-05-02
[patent_title] => 'CONTROL CONTACT DRIVING SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/660638 | CONTROL CONTACT DRIVING SYSTEM | Oct 24, 2012 | Abandoned |
Array
(
[id] => 9419334
[patent_doc_number] => 20140103984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'QUADRATURE SYMMETRIC CLOCK SIGNAL GENERATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/654328 | QUADRATURE SYMMETRIC CLOCK SIGNAL GENERATION | Oct 16, 2012 | Abandoned |
Array
(
[id] => 10883321
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[patent_title] => 'Fully integrated circuit for generating a ramp signal'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/648557 | Fully integrated circuit for generating a ramp signal | Oct 9, 2012 | Issued |
Array
(
[id] => 9515856
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[patent_title] => 'BICMOS CURRENT REFERENCE CIRCUIT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/115630 | BICMOS CURRENT REFERENCE CIRCUIT | Sep 26, 2012 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/619765 | CONFIGURABLE DELAY CIRCUIT | Sep 13, 2012 | Abandoned |
Array
(
[id] => 8718481
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/615268 | INPUT BUFFER | Sep 12, 2012 | Abandoned |
Array
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Array
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