Search

John E. Uselding

Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )

Most Active Art Unit
1763
Art Unit(s)
4171, 1796, 1763
Total Applications
1454
Issued Applications
729
Pending Applications
129
Abandoned Applications
616

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9132569 [patent_doc_number] => 20130293282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'CHARGE-SAVING POWER-GATE APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/976156 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5567 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976156
Charge-saving power-gate apparatus and method Sep 22, 2011 Issued
Array ( [id] => 13772715 [patent_doc_number] => 10178716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => LED driver circuit and method [patent_app_type] => utility [patent_app_number] => 13/880890 [patent_app_country] => US [patent_app_date] => 2011-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 5283 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13880890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/880890
LED driver circuit and method Sep 8, 2011 Issued
Array ( [id] => 10858472 [patent_doc_number] => 08884676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Clock generator with duty cycle control and method' [patent_app_type] => utility [patent_app_number] => 13/215774 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2594 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 601 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215774 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215774
Clock generator with duty cycle control and method Aug 22, 2011 Issued
Array ( [id] => 9704907 [patent_doc_number] => 08829980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Phased-array charge pump supply' [patent_app_type] => utility [patent_app_number] => 13/214904 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3548 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214904 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214904
Phased-array charge pump supply Aug 21, 2011 Issued
Array ( [id] => 8183125 [patent_doc_number] => 20120114067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'EMPHASIS SIGNAL GENERATION CIRCUIT AND SIGNAL SYNTHESIS CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/209885 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20120114067.pdf [firstpage_image] =>[orig_patent_app_number] => 13209885 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209885
EMPHASIS SIGNAL GENERATION CIRCUIT AND SIGNAL SYNTHESIS CIRCUIT Aug 14, 2011 Abandoned
Array ( [id] => 11753172 [patent_doc_number] => 09711189 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-18 [patent_title] => 'On-die input reference voltage with self-calibrating duty cycle correction' [patent_app_type] => utility [patent_app_number] => 13/209307 [patent_app_country] => US [patent_app_date] => 2011-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5751 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13209307 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209307
On-die input reference voltage with self-calibrating duty cycle correction Aug 11, 2011 Issued
Array ( [id] => 8657537 [patent_doc_number] => 20130038366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'BIST CIRCUIT FOR PHASE MEASUREMENT' [patent_app_type] => utility [patent_app_number] => 13/205722 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13205722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/205722
BIST circuit for phase measurement Aug 8, 2011 Issued
Array ( [id] => 8657522 [patent_doc_number] => 20130038351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'PHASE DETECTOR' [patent_app_type] => utility [patent_app_number] => 13/206138 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 14261 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13206138 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/206138
Phase detector Aug 8, 2011 Issued
Array ( [id] => 8635289 [patent_doc_number] => 20130027092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'Digital Output Driver' [patent_app_type] => utility [patent_app_number] => 13/193003 [patent_app_country] => US [patent_app_date] => 2011-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5722 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13193003 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/193003
Digital Output Driver Jul 27, 2011 Abandoned
Array ( [id] => 8310971 [patent_doc_number] => 20120187992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'CLOCK DELAY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/188651 [patent_app_country] => US [patent_app_date] => 2011-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3812 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13188651 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/188651
CLOCK DELAY CIRCUIT Jul 21, 2011 Abandoned
Array ( [id] => 7717808 [patent_doc_number] => 20120007637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'LOAD DRIVER SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/178230 [patent_app_country] => US [patent_app_date] => 2011-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 19044 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007637.pdf [firstpage_image] =>[orig_patent_app_number] => 13178230 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/178230
LOAD DRIVER SYSTEM Jul 6, 2011 Abandoned
Array ( [id] => 8345265 [patent_doc_number] => 20120206191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'EDGE RATE CONTROL (ERC) PRE-BIASING TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/177019 [patent_app_country] => US [patent_app_date] => 2011-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13177019 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/177019
EDGE RATE CONTROL (ERC) PRE-BIASING TECHNIQUE Jul 5, 2011 Abandoned
Array ( [id] => 12256060 [patent_doc_number] => 09928205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'Semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 13/162702 [patent_app_country] => US [patent_app_date] => 2011-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5299 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13162702 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/162702
Semiconductor apparatus Jun 16, 2011 Issued
Array ( [id] => 9406632 [patent_doc_number] => 20140097884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD OF IMPLEMENTING POWER GATING WITHIN AN INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 14/122556 [patent_app_country] => US [patent_app_date] => 2011-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4918 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14122556 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/122556
Integrated circuit device and method of implementing power gating within an integrated circuit device Jun 14, 2011 Issued
Array ( [id] => 9367983 [patent_doc_number] => 20140077856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD FOR SELF-HEATING AN INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 14/115710 [patent_app_country] => US [patent_app_date] => 2011-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5904 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14115710 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/115710
INTEGRATED CIRCUIT DEVICE AND METHOD FOR SELF-HEATING AN INTEGRATED CIRCUIT DEVICE May 26, 2011 Abandoned
Array ( [id] => 8493808 [patent_doc_number] => 20120293216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'MEMS CAPACITIVE SENSOR BIASING CIRCUIT INCLUDING AN INTEGRATED INDUCTOR' [patent_app_type] => utility [patent_app_number] => 13/110360 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1269 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13110360 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110360
MEMS capacitive sensor biasing circuit including an integrated inductor May 17, 2011 Issued
Array ( [id] => 7565384 [patent_doc_number] => 20110285447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'DRIVE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/106219 [patent_app_country] => US [patent_app_date] => 2011-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4189 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20110285447.pdf [firstpage_image] =>[orig_patent_app_number] => 13106219 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/106219
DRIVE CIRCUIT May 11, 2011 Abandoned
Array ( [id] => 7559375 [patent_doc_number] => 20110273207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'JUNCTION GATE DRIVER' [patent_app_type] => utility [patent_app_number] => 13/104656 [patent_app_country] => US [patent_app_date] => 2011-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7889 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20110273207.pdf [firstpage_image] =>[orig_patent_app_number] => 13104656 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/104656
JUNCTION GATE DRIVER May 9, 2011 Abandoned
Array ( [id] => 8481316 [patent_doc_number] => 20120280723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'Driver with Impedance Control' [patent_app_type] => utility [patent_app_number] => 13/101862 [patent_app_country] => US [patent_app_date] => 2011-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5023 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13101862 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/101862
Driver with Impedance Control May 4, 2011 Abandoned
Array ( [id] => 7751430 [patent_doc_number] => 20120025894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Multi-Mode Output Transmitter' [patent_app_type] => utility [patent_app_number] => 13/098004 [patent_app_country] => US [patent_app_date] => 2011-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6890 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025894.pdf [firstpage_image] =>[orig_patent_app_number] => 13098004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/098004
Multi-Mode Output Transmitter Apr 28, 2011 Abandoned
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