Search

John E. Uselding

Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )

Most Active Art Unit
1763
Art Unit(s)
4171, 1796, 1763
Total Applications
1454
Issued Applications
729
Pending Applications
129
Abandoned Applications
616

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7706500 [patent_doc_number] => 20120001231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Electrical Fuse' [patent_app_type] => utility [patent_app_number] => 12/827326 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3058 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12827326 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/827326
Electrical Fuse Jun 29, 2010 Abandoned
Array ( [id] => 6231850 [patent_doc_number] => 20100264899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'SEMICONDUCTOR DEVICE GENERATING VOLTAGE FOR TEMPERATURE COMPENSATION' [patent_app_type] => utility [patent_app_number] => 12/827221 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13659 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20100264899.pdf [firstpage_image] =>[orig_patent_app_number] => 12827221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/827221
SEMICONDUCTOR DEVICE GENERATING VOLTAGE FOR TEMPERATURE COMPENSATION Jun 29, 2010 Abandoned
Array ( [id] => 7707349 [patent_doc_number] => 20120001659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Voltage-to-Current Converter with Feedback' [patent_app_type] => utility [patent_app_number] => 12/828083 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12828083 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/828083
Voltage-to-Current Converter with Feedback Jun 29, 2010 Abandoned
Array ( [id] => 5941404 [patent_doc_number] => 20110102024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'DATA OUTPUT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/825780 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4014 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20110102024.pdf [firstpage_image] =>[orig_patent_app_number] => 12825780 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/825780
DATA OUTPUT CIRCUIT Jun 28, 2010 Abandoned
Array ( [id] => 5941405 [patent_doc_number] => 20110102025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'DATA OUTPUT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/825799 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3300 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20110102025.pdf [firstpage_image] =>[orig_patent_app_number] => 12825799 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/825799
DATA OUTPUT CIRCUIT Jun 28, 2010 Abandoned
Array ( [id] => 7667236 [patent_doc_number] => 20110316505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Output Buffer With Improved Output Signal Quality' [patent_app_type] => utility [patent_app_number] => 12/821168 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4882 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821168 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821168
Output Buffer With Improved Output Signal Quality Jun 22, 2010 Abandoned
Array ( [id] => 6021986 [patent_doc_number] => 20110050312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'MULTI-PHASE CLOCK GENERATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/820756 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20110050312.pdf [firstpage_image] =>[orig_patent_app_number] => 12820756 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820756
MULTI-PHASE CLOCK GENERATION CIRCUIT Jun 21, 2010 Abandoned
Array ( [id] => 9692823 [patent_doc_number] => 08823427 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-02 [patent_title] => 'Unit element ramp generator for analog-to-digital converter' [patent_app_type] => utility [patent_app_number] => 12/819005 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3752 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12819005 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819005
Unit element ramp generator for analog-to-digital converter Jun 17, 2010 Issued
Array ( [id] => 6576371 [patent_doc_number] => 20100321079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/817470 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20100321079.pdf [firstpage_image] =>[orig_patent_app_number] => 12817470 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817470
SEMICONDUCTOR INTEGRATED CIRCUIT Jun 16, 2010 Abandoned
Array ( [id] => 7660603 [patent_doc_number] => 20110309872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Voltage Spike Protection for Power DMOS Devices' [patent_app_type] => utility [patent_app_number] => 12/817869 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3603 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20110309872.pdf [firstpage_image] =>[orig_patent_app_number] => 12817869 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817869
Voltage Spike Protection for Power DMOS Devices Jun 16, 2010 Abandoned
Array ( [id] => 6091604 [patent_doc_number] => 20110001543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 12/813852 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001543.pdf [firstpage_image] =>[orig_patent_app_number] => 12813852 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813852
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Jun 10, 2010 Abandoned
Array ( [id] => 6371329 [patent_doc_number] => 20100315149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'High-speed data compared latch with auto-adjustment of offset' [patent_app_type] => utility [patent_app_number] => 12/797608 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4001 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20100315149.pdf [firstpage_image] =>[orig_patent_app_number] => 12797608 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797608
High-speed data compared latch with auto-adjustment of offset Jun 9, 2010 Abandoned
Array ( [id] => 6591298 [patent_doc_number] => 20100308886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'OFFSET CANCELLING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/796167 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4786 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0308/20100308886.pdf [firstpage_image] =>[orig_patent_app_number] => 12796167 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/796167
OFFSET CANCELLING CIRCUIT Jun 7, 2010 Abandoned
Array ( [id] => 6591493 [patent_doc_number] => 20100308904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'DEVICE FOR GENERATING A REFERENCE VOLTAGE DESIGNED FOR A SYSTEM OF THE SWITCHED-CAPACITOR TYPE' [patent_app_type] => utility [patent_app_number] => 12/792930 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3699 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0308/20100308904.pdf [firstpage_image] =>[orig_patent_app_number] => 12792930 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792930
DEVICE FOR GENERATING A REFERENCE VOLTAGE DESIGNED FOR A SYSTEM OF THE SWITCHED-CAPACITOR TYPE Jun 2, 2010 Abandoned
Array ( [id] => 10145684 [patent_doc_number] => 09178503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Differential comparator circuit having a wide common mode input range' [patent_app_type] => utility [patent_app_number] => 12/790425 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4036 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12790425 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/790425
Differential comparator circuit having a wide common mode input range May 27, 2010 Issued
Array ( [id] => 6562627 [patent_doc_number] => 20100289564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'ELECTRONIC DEVICE AND A METHOD OF BIASING A MOS TRANSISTOR IN AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/783453 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5123 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20100289564.pdf [firstpage_image] =>[orig_patent_app_number] => 12783453 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783453
ELECTRONIC DEVICE AND A METHOD OF BIASING A MOS TRANSISTOR IN AN INTEGRATED CIRCUIT May 18, 2010 Abandoned
Array ( [id] => 6378902 [patent_doc_number] => 20100301921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'SWITCHING CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/782166 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3896 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20100301921.pdf [firstpage_image] =>[orig_patent_app_number] => 12782166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782166
SWITCHING CONTROL CIRCUIT May 17, 2010 Abandoned
Array ( [id] => 8070557 [patent_doc_number] => 20110241746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'LOW POWER SMALL AREA STATIC PHASE INTERPOLATOR WITH GOOD LINEARITY' [patent_app_type] => utility [patent_app_number] => 12/749657 [patent_app_country] => US [patent_app_date] => 2010-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4126 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241746.pdf [firstpage_image] =>[orig_patent_app_number] => 12749657 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/749657
LOW POWER SMALL AREA STATIC PHASE INTERPOLATOR WITH GOOD LINEARITY Mar 29, 2010 Abandoned
Array ( [id] => 6524635 [patent_doc_number] => 20100231279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'Phase Shift Generating Circuit' [patent_app_type] => utility [patent_app_number] => 12/722320 [patent_app_country] => US [patent_app_date] => 2010-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5729 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20100231279.pdf [firstpage_image] =>[orig_patent_app_number] => 12722320 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/722320
Phase shift generating circuit Mar 10, 2010 Issued
Array ( [id] => 10074134 [patent_doc_number] => 09112507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Phase-locked loop start up circuit' [patent_app_type] => utility [patent_app_number] => 12/719951 [patent_app_country] => US [patent_app_date] => 2010-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12719951 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719951
Phase-locked loop start up circuit Mar 8, 2010 Issued
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