Search

John E. Uselding

Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )

Most Active Art Unit
1763
Art Unit(s)
4171, 1796, 1763
Total Applications
1454
Issued Applications
729
Pending Applications
129
Abandoned Applications
616

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 345665 [patent_doc_number] => 07498855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Power-on clear circuit' [patent_app_type] => utility [patent_app_number] => 11/193470 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4917 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/498/07498855.pdf [firstpage_image] =>[orig_patent_app_number] => 11193470 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/193470
Power-on clear circuit Jul 31, 2005 Issued
Array ( [id] => 5818424 [patent_doc_number] => 20060022737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Device for the regulated delay of a clock signal' [patent_app_type] => utility [patent_app_number] => 11/194510 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13545 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022737.pdf [firstpage_image] =>[orig_patent_app_number] => 11194510 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194510
Device for the regulated delay of a clock signal Jul 31, 2005 Abandoned
Array ( [id] => 5774792 [patent_doc_number] => 20060103432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Bidirectional deglitch circuit' [patent_app_type] => utility [patent_app_number] => 11/192969 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3133 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20060103432.pdf [firstpage_image] =>[orig_patent_app_number] => 11192969 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192969
Bidirectional deglitch circuit Jul 28, 2005 Issued
Array ( [id] => 5824211 [patent_doc_number] => 20060061393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Method and device for digitally measuring the phase of a signal' [patent_app_type] => utility [patent_app_number] => 11/192357 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6357 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20060061393.pdf [firstpage_image] =>[orig_patent_app_number] => 11192357 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192357
Method and device for digitally measuring the phase of a signal Jul 28, 2005 Abandoned
Array ( [id] => 5879772 [patent_doc_number] => 20060028854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 11/192402 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1843 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20060028854.pdf [firstpage_image] =>[orig_patent_app_number] => 11192402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192402
Charge pump circuit Jul 28, 2005 Abandoned
Array ( [id] => 5796868 [patent_doc_number] => 20060033545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Dual-mode pulse generator' [patent_app_type] => utility [patent_app_number] => 11/191662 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2686 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033545.pdf [firstpage_image] =>[orig_patent_app_number] => 11191662 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191662
Dual-mode pulse generator Jul 27, 2005 Issued
Array ( [id] => 904772 [patent_doc_number] => 07336118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Inverter apparatus' [patent_app_type] => utility [patent_app_number] => 11/191023 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4455 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/336/07336118.pdf [firstpage_image] =>[orig_patent_app_number] => 11191023 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191023
Inverter apparatus Jul 27, 2005 Issued
Array ( [id] => 5073461 [patent_doc_number] => 20070013436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Bandgap reference circuit' [patent_app_type] => utility [patent_app_number] => 11/192892 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2445 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20070013436.pdf [firstpage_image] =>[orig_patent_app_number] => 11192892 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192892
Bandgap reference circuit Jul 27, 2005 Abandoned
Array ( [id] => 5202859 [patent_doc_number] => 20070024338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Circuitry and methods for programmably adjusting the duty cycles of serial data signals' [patent_app_type] => utility [patent_app_number] => 11/193146 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024338.pdf [firstpage_image] =>[orig_patent_app_number] => 11193146 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/193146
Circuitry and methods for programmably adjusting the duty cycles of serial data signals Jul 27, 2005 Abandoned
Array ( [id] => 5202853 [patent_doc_number] => 20070024332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'All MOS power-on-reset circuit' [patent_app_type] => utility [patent_app_number] => 11/192152 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2712 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024332.pdf [firstpage_image] =>[orig_patent_app_number] => 11192152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192152
All MOS power-on-reset circuit Jul 27, 2005 Abandoned
Array ( [id] => 419283 [patent_doc_number] => 07276960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Voltage regulated charge pump with regulated charge current into the flying capacitor' [patent_app_type] => utility [patent_app_number] => 11/190630 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276960.pdf [firstpage_image] =>[orig_patent_app_number] => 11190630 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/190630
Voltage regulated charge pump with regulated charge current into the flying capacitor Jul 26, 2005 Issued
Array ( [id] => 5909848 [patent_doc_number] => 20060125547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Adjustable and programmable temperature coefficient-proportional to absolute temperature (APTC-PTAT) circuit' [patent_app_type] => utility [patent_app_number] => 11/190441 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4584 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20060125547.pdf [firstpage_image] =>[orig_patent_app_number] => 11190441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/190441
Adjustable and programmable temperature coefficient-proportional to absolute temperature (APTC-PTAT) circuit Jul 26, 2005 Abandoned
Array ( [id] => 7595027 [patent_doc_number] => 07626435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'High resolution delay line architecture' [patent_app_type] => utility [patent_app_number] => 11/191110 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626435.pdf [firstpage_image] =>[orig_patent_app_number] => 11191110 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191110
High resolution delay line architecture Jul 26, 2005 Issued
Array ( [id] => 5917809 [patent_doc_number] => 20060238231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Pulse signal generator device' [patent_app_type] => utility [patent_app_number] => 11/188902 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8080 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20060238231.pdf [firstpage_image] =>[orig_patent_app_number] => 11188902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188902
Pulse signal generator device Jul 25, 2005 Abandoned
Array ( [id] => 5818413 [patent_doc_number] => 20060022726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Method of switching PLL characteristics and PLL circuit' [patent_app_type] => utility [patent_app_number] => 11/189115 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8597 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022726.pdf [firstpage_image] =>[orig_patent_app_number] => 11189115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/189115
Method of switching PLL characteristics and PLL circuit Jul 25, 2005 Issued
Array ( [id] => 5863642 [patent_doc_number] => 20060097772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 11/188855 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5894 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097772.pdf [firstpage_image] =>[orig_patent_app_number] => 11188855 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188855
Charge pump circuit Jul 25, 2005 Issued
Array ( [id] => 865932 [patent_doc_number] => 07368972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Power transistor control device' [patent_app_type] => utility [patent_app_number] => 11/188843 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5057 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368972.pdf [firstpage_image] =>[orig_patent_app_number] => 11188843 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188843
Power transistor control device Jul 25, 2005 Issued
Array ( [id] => 5818414 [patent_doc_number] => 20060022727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Charge pump with balanced and constant up and down currents' [patent_app_type] => utility [patent_app_number] => 11/188833 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022727.pdf [firstpage_image] =>[orig_patent_app_number] => 11188833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188833
Charge pump with balanced and constant up and down currents Jul 24, 2005 Issued
Array ( [id] => 5818404 [patent_doc_number] => 20060022717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Circuit and method for detecting phase' [patent_app_type] => utility [patent_app_number] => 11/188952 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6118 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022717.pdf [firstpage_image] =>[orig_patent_app_number] => 11188952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188952
Circuit and method for detecting phase Jul 24, 2005 Issued
Array ( [id] => 857719 [patent_doc_number] => 07375559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-20 [patent_title] => 'Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection' [patent_app_type] => utility [patent_app_number] => 11/176998 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4203 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/375/07375559.pdf [firstpage_image] =>[orig_patent_app_number] => 11176998 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176998
Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection Jul 6, 2005 Issued
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