
John E. Uselding
Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )
| Most Active Art Unit | 1763 |
| Art Unit(s) | 4171, 1796, 1763 |
| Total Applications | 1454 |
| Issued Applications | 729 |
| Pending Applications | 129 |
| Abandoned Applications | 616 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5832821
[patent_doc_number] => 20060244651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Current source generator utilizing a portion of a targeted analog circuit'
[patent_app_type] => utility
[patent_app_number] => 11/119288
[patent_app_country] => US
[patent_app_date] => 2005-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7080
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0244/20060244651.pdf
[firstpage_image] =>[orig_patent_app_number] => 11119288
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/119288 | Current source generator utilizing a portion of a targeted analog circuit | Apr 28, 2005 | Issued |
Array
(
[id] => 6965132
[patent_doc_number] => 20050232029
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'Write pulse generation for recording on optical media'
[patent_app_type] => utility
[patent_app_number] => 11/106013
[patent_app_country] => US
[patent_app_date] => 2005-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1688
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0232/20050232029.pdf
[firstpage_image] =>[orig_patent_app_number] => 11106013
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/106013 | Write pulse generation for recording on optical media | Apr 12, 2005 | Abandoned |
Array
(
[id] => 5892918
[patent_doc_number] => 20060001456
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-05
[patent_title] => 'Low voltage driver'
[patent_app_type] => utility
[patent_app_number] => 11/083078
[patent_app_country] => US
[patent_app_date] => 2005-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3337
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20060001456.pdf
[firstpage_image] =>[orig_patent_app_number] => 11083078
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/083078 | Low voltage driver | Mar 16, 2005 | Abandoned |
Array
(
[id] => 356733
[patent_doc_number] => 07489173
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-02-10
[patent_title] => 'Signal adjustment for duty cycle control'
[patent_app_type] => utility
[patent_app_number] => 11/061697
[patent_app_country] => US
[patent_app_date] => 2005-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5759
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/489/07489173.pdf
[firstpage_image] =>[orig_patent_app_number] => 11061697
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/061697 | Signal adjustment for duty cycle control | Feb 17, 2005 | Issued |
Array
(
[id] => 440530
[patent_doc_number] => 07259596
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Circuit arrangement for monitoring a voltage'
[patent_app_type] => utility
[patent_app_number] => 10/980212
[patent_app_country] => US
[patent_app_date] => 2004-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3997
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259596.pdf
[firstpage_image] =>[orig_patent_app_number] => 10980212
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/980212 | Circuit arrangement for monitoring a voltage | Nov 1, 2004 | Issued |
Array
(
[id] => 196794
[patent_doc_number] => 07635996
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-22
[patent_title] => 'Differential blocking sampler, in particular for an analog digital converter'
[patent_app_type] => utility
[patent_app_number] => 10/570322
[patent_app_country] => US
[patent_app_date] => 2004-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5544
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/635/07635996.pdf
[firstpage_image] =>[orig_patent_app_number] => 10570322
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/570322 | Differential blocking sampler, in particular for an analog digital converter | Oct 14, 2004 | Issued |
Array
(
[id] => 5724886
[patent_doc_number] => 20060055646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Latch-based serial port output buffer'
[patent_app_type] => utility
[patent_app_number] => 10/942219
[patent_app_country] => US
[patent_app_date] => 2004-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6683
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0055/20060055646.pdf
[firstpage_image] =>[orig_patent_app_number] => 10942219
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/942219 | Latch-based serial port output buffer | Sep 15, 2004 | Issued |
Array
(
[id] => 5692139
[patent_doc_number] => 20060152284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-13
[patent_title] => 'Semiconductor device with high-breakdown-voltage regulator'
[patent_app_type] => utility
[patent_app_number] => 10/563120
[patent_app_country] => US
[patent_app_date] => 2004-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5222
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20060152284.pdf
[firstpage_image] =>[orig_patent_app_number] => 10563120
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/563120 | Semiconductor device with high-breakdown-voltage regulator | Jun 30, 2004 | Abandoned |
Array
(
[id] => 7214518
[patent_doc_number] => 20050253256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Supply line arrangement, off chip driver arrangement, and semiconductor circuitry module'
[patent_app_type] => utility
[patent_app_number] => 10/835389
[patent_app_country] => US
[patent_app_date] => 2004-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2630
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20050253256.pdf
[firstpage_image] =>[orig_patent_app_number] => 10835389
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/835389 | Supply line arrangement, off chip driver arrangement, and semiconductor circuitry module | Apr 29, 2004 | Abandoned |
Array
(
[id] => 5031680
[patent_doc_number] => 20070096219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'Lateral bipolar cmos integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/551266
[patent_app_country] => US
[patent_app_date] => 2004-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 7983
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0096/20070096219.pdf
[firstpage_image] =>[orig_patent_app_number] => 10551266
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/551266 | Lateral bipolar cmos integrated circuit | Mar 10, 2004 | Abandoned |
Array
(
[id] => 5084383
[patent_doc_number] => 20070274434
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-29
[patent_title] => 'Period-to-Digital Converter'
[patent_app_type] => utility
[patent_app_number] => 10/543422
[patent_app_country] => US
[patent_app_date] => 2004-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4144
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0274/20070274434.pdf
[firstpage_image] =>[orig_patent_app_number] => 10543422
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/543422 | Period-to-Digital Converter | Jan 26, 2004 | Abandoned |
Array
(
[id] => 6964361
[patent_doc_number] => 20050231258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'Static flip-flop circuit'
[patent_app_type] => utility
[patent_app_number] => 10/519457
[patent_app_country] => US
[patent_app_date] => 2003-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6382
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20050231258.pdf
[firstpage_image] =>[orig_patent_app_number] => 10519457
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/519457 | Static flip-flop circuit | Jun 23, 2003 | Abandoned |