
John E. Uselding
Examiner (ID: 6863, Phone: (571)270-5463 , Office: P/1763 )
| Most Active Art Unit | 1763 |
| Art Unit(s) | 4171, 1796, 1763 |
| Total Applications | 1454 |
| Issued Applications | 729 |
| Pending Applications | 129 |
| Abandoned Applications | 616 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18662073
[patent_doc_number] => 20230308090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => GATE DRIVER OUTPUT PROTECTION CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/126923
[patent_app_country] => US
[patent_app_date] => 2023-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18126923
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/126923 | Gate driver output protection circuit | Mar 26, 2023 | Issued |
Array
(
[id] => 19434357
[patent_doc_number] => 20240302855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-12
[patent_title] => PHASE DETECTION CIRCUITRY FOR HIGH-FREQUENCY PHASE ERROR DETECTION
[patent_app_type] => utility
[patent_app_number] => 18/119761
[patent_app_country] => US
[patent_app_date] => 2023-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7081
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119761
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/119761 | Phase detection circuitry for high-frequency phase error detection | Mar 8, 2023 | Issued |
Array
(
[id] => 18632487
[patent_doc_number] => 20230291398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => SIGNAL CONVERTING CIRCUIT AND BIAS VOLTAGE GENERATION CIRCUIT THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/173787
[patent_app_country] => US
[patent_app_date] => 2023-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173787
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/173787 | Signal converting circuit and bias voltage generation circuit thereof | Feb 23, 2023 | Issued |
Array
(
[id] => 19829182
[patent_doc_number] => 12249979
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-11
[patent_title] => Signal converting circuit
[patent_app_type] => utility
[patent_app_number] => 18/173785
[patent_app_country] => US
[patent_app_date] => 2023-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5606
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173785
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/173785 | Signal converting circuit | Feb 23, 2023 | Issued |
Array
(
[id] => 19741803
[patent_doc_number] => 12218656
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-04
[patent_title] => Driving apparatus and driving method
[patent_app_type] => utility
[patent_app_number] => 18/172254
[patent_app_country] => US
[patent_app_date] => 2023-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 9330
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172254
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/172254 | Driving apparatus and driving method | Feb 20, 2023 | Issued |
Array
(
[id] => 20132733
[patent_doc_number] => 12375051
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Auto-calibration systems and methods for reducing amplifier offset
[patent_app_type] => utility
[patent_app_number] => 18/108198
[patent_app_country] => US
[patent_app_date] => 2023-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 0
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108198
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/108198 | Auto-calibration systems and methods for reducing amplifier offset | Feb 9, 2023 | Issued |
Array
(
[id] => 20081349
[patent_doc_number] => 12355431
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Switch with back gate-connected compensation capacitors
[patent_app_type] => utility
[patent_app_number] => 18/158572
[patent_app_country] => US
[patent_app_date] => 2023-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7328
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158572
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/158572 | Switch with back gate-connected compensation capacitors | Jan 23, 2023 | Issued |
Array
(
[id] => 20159351
[patent_doc_number] => 12385972
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Latchup detector and clock loss detector
[patent_app_type] => utility
[patent_app_number] => 18/158624
[patent_app_country] => US
[patent_app_date] => 2023-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 12
[patent_no_of_words] => 2238
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158624
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/158624 | Latchup detector and clock loss detector | Jan 23, 2023 | Issued |
Array
(
[id] => 18586655
[patent_doc_number] => 20230268920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-24
[patent_title] => BOOTSTRAPPED SWITCH
[patent_app_type] => utility
[patent_app_number] => 18/098132
[patent_app_country] => US
[patent_app_date] => 2023-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3664
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098132
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/098132 | Bootstrapped switch | Jan 17, 2023 | Issued |
Array
(
[id] => 18790171
[patent_doc_number] => 20230378956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-23
[patent_title] => DELAY CIRCUIT AND MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/155212
[patent_app_country] => US
[patent_app_date] => 2023-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9958
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155212
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155212 | Delay circuit and memory | Jan 16, 2023 | Issued |
Array
(
[id] => 19286710
[patent_doc_number] => 20240223190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => TRANSIENT INSENSITIVE LEVEL SHIFTER
[patent_app_type] => utility
[patent_app_number] => 18/149549
[patent_app_country] => US
[patent_app_date] => 2023-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9021
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149549
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/149549 | Transient insensitive level shifter | Jan 2, 2023 | Issued |
Array
(
[id] => 19286687
[patent_doc_number] => 20240223167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => PROCESS-VOLTAGE-TEMPERATURE TOLERANT REPLICA FEEDBACK PULSE GENERATOR CIRCUIT FOR PULSED LATCH
[patent_app_type] => utility
[patent_app_number] => 18/091970
[patent_app_country] => US
[patent_app_date] => 2022-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091970
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/091970 | PROCESS-VOLTAGE-TEMPERATURE TOLERANT REPLICA FEEDBACK PULSE GENERATOR CIRCUIT FOR PULSED LATCH | Dec 29, 2022 | Pending |
Array
(
[id] => 18474129
[patent_doc_number] => 20230208417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => RF SWITCH STACK WITH CHARGE CONTROL ELEMENTS
[patent_app_type] => utility
[patent_app_number] => 18/146753
[patent_app_country] => US
[patent_app_date] => 2022-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6492
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146753
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/146753 | RF switch stack with charge control elements | Dec 26, 2022 | Issued |
Array
(
[id] => 19652862
[patent_doc_number] => 12174648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-24
[patent_title] => Power management circuit and method for integrated circuit having multiple power domains
[patent_app_type] => utility
[patent_app_number] => 18/146789
[patent_app_country] => US
[patent_app_date] => 2022-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 12483
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146789
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/146789 | Power management circuit and method for integrated circuit having multiple power domains | Dec 26, 2022 | Issued |
Array
(
[id] => 19508379
[patent_doc_number] => 12119812
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-15
[patent_title] => Electronic circuit arrangement for current distribution
[patent_app_type] => utility
[patent_app_number] => 18/065637
[patent_app_country] => US
[patent_app_date] => 2022-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4082
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065637
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/065637 | Electronic circuit arrangement for current distribution | Dec 13, 2022 | Issued |
Array
(
[id] => 19720842
[patent_doc_number] => 12206391
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Pre-driven bootstrapping drivers
[patent_app_type] => utility
[patent_app_number] => 18/062756
[patent_app_country] => US
[patent_app_date] => 2022-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3133
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062756
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/062756 | Pre-driven bootstrapping drivers | Dec 6, 2022 | Issued |
Array
(
[id] => 18489142
[patent_doc_number] => 20230216493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => Output stage of Ethernet transmitter
[patent_app_type] => utility
[patent_app_number] => 18/074825
[patent_app_country] => US
[patent_app_date] => 2022-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3020
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18074825
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/074825 | Output stage of ethernet transmitter | Dec 4, 2022 | Issued |
Array
(
[id] => 19720853
[patent_doc_number] => 12206402
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Control unit for an electrical load, in particular for a motor vehicle
[patent_app_type] => utility
[patent_app_number] => 18/061751
[patent_app_country] => US
[patent_app_date] => 2022-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3255
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061751
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/061751 | Control unit for an electrical load, in particular for a motor vehicle | Dec 4, 2022 | Issued |
Array
(
[id] => 18267154
[patent_doc_number] => 20230088396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => DRIVE DEVICE FOR VOLTAGE-CONTROLLED SEMICONDUCTOR ELEMENT
[patent_app_type] => utility
[patent_app_number] => 17/994131
[patent_app_country] => US
[patent_app_date] => 2022-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4006
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994131
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/994131 | Drive device for voltage-controlled semiconductor element | Nov 24, 2022 | Issued |
Array
(
[id] => 20111990
[patent_doc_number] => 12362730
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-15
[patent_title] => SPDT switches with embedded attenuators
[patent_app_type] => utility
[patent_app_number] => 17/990428
[patent_app_country] => US
[patent_app_date] => 2022-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 19
[patent_no_of_words] => 6593
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17990428
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/990428 | SPDT switches with embedded attenuators | Nov 17, 2022 | Issued |