
John G. Mills
Examiner (ID: 17861)
| Most Active Art Unit | 2307 |
| Art Unit(s) | 2771, 2171, 2307 |
| Total Applications | 484 |
| Issued Applications | 430 |
| Pending Applications | 1 |
| Abandoned Applications | 53 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2424662
[patent_doc_number] => 04771383
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-09-13
[patent_title] => 'Sales data processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/752457
[patent_app_country] => US
[patent_app_date] => 1985-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 9690
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/771/04771383.pdf
[firstpage_image] =>[orig_patent_app_number] => 752457
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/752457 | Sales data processing apparatus | Jul 4, 1985 | Issued |
Array
(
[id] => 2396485
[patent_doc_number] => 04764896
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-16
[patent_title] => 'Microprocessor assisted memory to memory move apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/750797
[patent_app_country] => US
[patent_app_date] => 1985-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3557
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 388
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/764/04764896.pdf
[firstpage_image] =>[orig_patent_app_number] => 750797
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/750797 | Microprocessor assisted memory to memory move apparatus | Jun 30, 1985 | Issued |
Array
(
[id] => 2455867
[patent_doc_number] => 04755966
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-05
[patent_title] => 'Bidirectional branch prediction and optimization'
[patent_app_type] => 1
[patent_app_number] => 6/750625
[patent_app_country] => US
[patent_app_date] => 1985-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3618
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/755/04755966.pdf
[firstpage_image] =>[orig_patent_app_number] => 750625
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/750625 | Bidirectional branch prediction and optimization | Jun 27, 1985 | Issued |
Array
(
[id] => 2397803
[patent_doc_number] => 04754409
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-06-28
[patent_title] => 'Method for dynamically collecting current data from specified external processes and procedures for use in an expert system'
[patent_app_type] => 1
[patent_app_number] => 6/748789
[patent_app_country] => US
[patent_app_date] => 1985-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 23305
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/754/04754409.pdf
[firstpage_image] =>[orig_patent_app_number] => 748789
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/748789 | Method for dynamically collecting current data from specified external processes and procedures for use in an expert system | Jun 25, 1985 | Issued |
Array
(
[id] => 2497798
[patent_doc_number] => 04802113
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-31
[patent_title] => 'Pipeline control system'
[patent_app_type] => 1
[patent_app_number] => 6/758665
[patent_app_country] => US
[patent_app_date] => 1985-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4629
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/802/04802113.pdf
[firstpage_image] =>[orig_patent_app_number] => 758665
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/758665 | Pipeline control system | Jun 24, 1985 | Issued |
Array
(
[id] => 2526692
[patent_doc_number] => 04870567
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-26
[patent_title] => 'Microprogram control system'
[patent_app_type] => 1
[patent_app_number] => 6/755321
[patent_app_country] => US
[patent_app_date] => 1985-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2904
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/870/04870567.pdf
[firstpage_image] =>[orig_patent_app_number] => 755321
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/755321 | Microprogram control system | Jun 24, 1985 | Issued |
| 06/747014 | LOOSELY COUPLED DISTRIBUTED COMPUTER SYSTEM | Jun 19, 1985 | Abandoned |
Array
(
[id] => 2571429
[patent_doc_number] => 04945470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Hierarchy multi-processor system and control method therefor'
[patent_app_type] => 1
[patent_app_number] => 6/748870
[patent_app_country] => US
[patent_app_date] => 1985-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2297
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945470.pdf
[firstpage_image] =>[orig_patent_app_number] => 748870
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/748870 | Hierarchy multi-processor system and control method therefor | Jun 19, 1985 | Issued |
Array
(
[id] => 2393328
[patent_doc_number] => 04737932
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-12
[patent_title] => 'Processor'
[patent_app_type] => 1
[patent_app_number] => 6/741141
[patent_app_country] => US
[patent_app_date] => 1985-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4484
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/737/04737932.pdf
[firstpage_image] =>[orig_patent_app_number] => 741141
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/741141 | Processor | Jun 3, 1985 | Issued |
Array
(
[id] => 2460954
[patent_doc_number] => 04760553
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-26
[patent_title] => 'Terminal system configuration tracing method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/740094
[patent_app_country] => US
[patent_app_date] => 1985-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 3081
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/760/04760553.pdf
[firstpage_image] =>[orig_patent_app_number] => 740094
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/740094 | Terminal system configuration tracing method and apparatus | Jun 2, 1985 | Issued |
Array
(
[id] => 2524776
[patent_doc_number] => 04852065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-07-25
[patent_title] => 'Data reorganization apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/736866
[patent_app_country] => US
[patent_app_date] => 1985-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4258
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/852/04852065.pdf
[firstpage_image] =>[orig_patent_app_number] => 736866
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/736866 | Data reorganization apparatus | May 21, 1985 | Issued |
Array
(
[id] => 2361363
[patent_doc_number] => 04688220
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-18
[patent_title] => 'Distribution of a data stream in a series-parallel-series digital arrangement comprising digital units having at least one defective element'
[patent_app_type] => 1
[patent_app_number] => 6/734379
[patent_app_country] => US
[patent_app_date] => 1985-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4422
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 27
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/688/04688220.pdf
[firstpage_image] =>[orig_patent_app_number] => 734379
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/734379 | Distribution of a data stream in a series-parallel-series digital arrangement comprising digital units having at least one defective element | May 14, 1985 | Issued |
Array
(
[id] => 2390310
[patent_doc_number] => 04730268
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-08
[patent_title] => 'Distributed bus arbitration for a multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/728955
[patent_app_country] => US
[patent_app_date] => 1985-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3986
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/730/04730268.pdf
[firstpage_image] =>[orig_patent_app_number] => 728955
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/728955 | Distributed bus arbitration for a multiprocessor system | Apr 29, 1985 | Issued |
Array
(
[id] => 2218585
[patent_doc_number] => 04616311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-10-07
[patent_title] => 'Data processing system'
[patent_app_type] => 1
[patent_app_number] => 6/727197
[patent_app_country] => US
[patent_app_date] => 1985-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3438
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 299
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/616/04616311.pdf
[firstpage_image] =>[orig_patent_app_number] => 727197
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/727197 | Data processing system | Apr 28, 1985 | Issued |
Array
(
[id] => 2428849
[patent_doc_number] => 04734882
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-29
[patent_title] => 'Multilevel interrupt handling scheme'
[patent_app_type] => 1
[patent_app_number] => 6/718272
[patent_app_country] => US
[patent_app_date] => 1985-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5349
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/734/04734882.pdf
[firstpage_image] =>[orig_patent_app_number] => 718272
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/718272 | Multilevel interrupt handling scheme | Mar 31, 1985 | Issued |
Array
(
[id] => 2421377
[patent_doc_number] => 04742443
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-03
[patent_title] => 'Programmable controller with function chart interpreter'
[patent_app_type] => 1
[patent_app_number] => 6/717221
[patent_app_country] => US
[patent_app_date] => 1985-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 16091
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/742/04742443.pdf
[firstpage_image] =>[orig_patent_app_number] => 717221
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/717221 | Programmable controller with function chart interpreter | Mar 27, 1985 | Issued |
Array
(
[id] => 2393310
[patent_doc_number] => 04737931
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-12
[patent_title] => 'Memory control device'
[patent_app_type] => 1
[patent_app_number] => 6/716241
[patent_app_country] => US
[patent_app_date] => 1985-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 1592
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/737/04737931.pdf
[firstpage_image] =>[orig_patent_app_number] => 716241
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/716241 | Memory control device | Mar 25, 1985 | Issued |
| 06/704568 | MULTIPLE BUS SYSTEM INCLUDING A MICROPROCESSOR HAVING SEPARATE INSTRUCTION AND DATA INTERFACES AND CACHES | Feb 21, 1985 | Abandoned |
Array
(
[id] => 2205512
[patent_doc_number] => 04549281
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-22
[patent_title] => 'Electronic postage meter having keyboard entered combination for recharging'
[patent_app_type] => 1
[patent_app_number] => 6/702869
[patent_app_country] => US
[patent_app_date] => 1985-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 7851
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/549/04549281.pdf
[firstpage_image] =>[orig_patent_app_number] => 702869
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/702869 | Electronic postage meter having keyboard entered combination for recharging | Feb 20, 1985 | Issued |
Array
(
[id] => 2464471
[patent_doc_number] => 04718038
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-05
[patent_title] => 'Data security device for storing data at a peripheral part of the device during power down thus preventing improper retrieval'
[patent_app_type] => 1
[patent_app_number] => 6/700176
[patent_app_country] => US
[patent_app_date] => 1985-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5051
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/718/04718038.pdf
[firstpage_image] =>[orig_patent_app_number] => 700176
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/700176 | Data security device for storing data at a peripheral part of the device during power down thus preventing improper retrieval | Feb 10, 1985 | Issued |