Search

John G. Pickett

Supervisory Patent Examiner (ID: 13469, Phone: (571)272-4560 , Office: P/3728 )

Most Active Art Unit
3728
Art Unit(s)
3788, 3741, 3728, 3736, 3782
Total Applications
932
Issued Applications
383
Pending Applications
22
Abandoned Applications
527

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19849008 [patent_doc_number] => 20250094359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => FULLY PIPELINED READ-MODIFY-WRITE SUPPORT [patent_app_type] => utility [patent_app_number] => 18/966268 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18966268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/966268
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT Dec 2, 2024 Pending
Array ( [id] => 19850375 [patent_doc_number] => 20250095726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT INCLUDES A PLURALITY OF STRINGS [patent_app_type] => utility [patent_app_number] => 18/965632 [patent_app_country] => US [patent_app_date] => 2024-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 465 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18965632 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/965632
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE THAT INCLUDES A PLURALITY OF STRINGS Dec 1, 2024 Pending
Array ( [id] => 20087295 [patent_doc_number] => 20250217231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => DECODING METHOD AND DECODER DEVICE USED IN FLASH MEMORY CONTROLLER CAPABLE OF REDUCING DESIGN COMPLEXITY AND CIRCUIT COSTS [patent_app_type] => utility [patent_app_number] => 18/942784 [patent_app_country] => US [patent_app_date] => 2024-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18942784 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/942784
DECODING METHOD AND DECODER DEVICE USED IN FLASH MEMORY CONTROLLER CAPABLE OF REDUCING DESIGN COMPLEXITY AND CIRCUIT COSTS Nov 10, 2024 Pending
Array ( [id] => 19787339 [patent_doc_number] => 20250061018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => MEMORY ADDRESS PROTECTION CIRCUIT AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/936254 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936254
MEMORY ADDRESS PROTECTION CIRCUIT AND METHOD OF OPERATING SAME Nov 3, 2024 Pending
Array ( [id] => 19725846 [patent_doc_number] => 20250028597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DETECTING DATA BUS DRIVE FAULTS [patent_app_type] => utility [patent_app_number] => 18/904612 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/904612
DETECTING DATA BUS DRIVE FAULTS Oct 1, 2024 Pending
Array ( [id] => 19891945 [patent_doc_number] => 20250117257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ACCELERATOR DEVICE AND METHOD OF CONTROLLING ACCELERATOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/830998 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830998 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830998
ACCELERATOR DEVICE AND METHOD OF CONTROLLING ACCELERATOR DEVICE Sep 10, 2024 Pending
Array ( [id] => 19645023 [patent_doc_number] => 20240419543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => PROXIMITY BASED PARITY DATA MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/821484 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821484
PROXIMITY BASED PARITY DATA MANAGEMENT Aug 29, 2024 Pending
Array ( [id] => 19645013 [patent_doc_number] => 20240419533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SERVER-SIDE REMEDIATION FOR INCOMING SENSOR DATA [patent_app_type] => utility [patent_app_number] => 18/819016 [patent_app_country] => US [patent_app_date] => 2024-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18819016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/819016
SERVER-SIDE REMEDIATION FOR INCOMING SENSOR DATA Aug 28, 2024 Pending
Array ( [id] => 19689099 [patent_doc_number] => 20250007644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => RECEIVING METHOD WITH ERROR CORRECTION CODING WITH GENERATED DUMMY DATA [patent_app_type] => utility [patent_app_number] => 18/814106 [patent_app_country] => US [patent_app_date] => 2024-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 48778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814106 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/814106
RECEIVING METHOD WITH ERROR CORRECTION CODING WITH GENERATED DUMMY DATA Aug 22, 2024 Pending
Array ( [id] => 20168373 [patent_doc_number] => 20250260420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/807802 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807802
Memory system and nonvolatile memory device capable of compressing data from a memory plane and outputting data in parallel Aug 15, 2024 Issued
Array ( [id] => 19804994 [patent_doc_number] => 20250070919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => JOINT POLAR ENCODING OF MULTIPLE PAYLOADS WITH UNEQUAL ERROR PROTECTION [patent_app_type] => utility [patent_app_number] => 18/786141 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786141 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786141
JOINT POLAR ENCODING OF MULTIPLE PAYLOADS WITH UNEQUAL ERROR PROTECTION Jul 25, 2024 Pending
Array ( [id] => 19689102 [patent_doc_number] => 20250007647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => METHOD, APPARATUS, AND SYSTEM FOR IMPROVING RELIABILITY OF DATA TRANSMISSION INVOLVING AN ETHERNET DEVICE [patent_app_type] => utility [patent_app_number] => 18/775927 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775927
METHOD, APPARATUS, AND SYSTEM FOR IMPROVING RELIABILITY OF DATA TRANSMISSION INVOLVING AN ETHERNET DEVICE Jul 16, 2024 Pending
Array ( [id] => 19558588 [patent_doc_number] => 20240370380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A VICTIM CACHE [patent_app_type] => utility [patent_app_number] => 18/775300 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775300 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775300
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A VICTIM CACHE Jul 16, 2024 Pending
Array ( [id] => 20160072 [patent_doc_number] => 12386700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Managing data integrity using a change in a number of data errors and an amount of time in which the change occurred [patent_app_type] => utility [patent_app_number] => 18/755592 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18755592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/755592
Managing data integrity using a change in a number of data errors and an amount of time in which the change occurred Jun 25, 2024 Issued
Array ( [id] => 20447006 [patent_doc_number] => 20260003728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => POLAR-BCH COMBINED GENERALIZED CONCATENATED CODES [patent_app_type] => utility [patent_app_number] => 18/754892 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754892 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754892
POLAR-BCH COMBINED GENERALIZED CONCATENATED CODES Jun 25, 2024 Pending
Array ( [id] => 20595312 [patent_doc_number] => 12579029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Hashing based method for NAND data inversion [patent_app_type] => utility [patent_app_number] => 18/747831 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747831 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747831
Hashing based method for NAND data inversion Jun 18, 2024 Issued
Array ( [id] => 19878568 [patent_doc_number] => 20250110825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => APPARATUSES AND METHODS FOR READ/MODIFY/WRITE SINGLE-PASS METADATA ACCESS OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/747635 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747635
APPARATUSES AND METHODS FOR READ/MODIFY/WRITE SINGLE-PASS METADATA ACCESS OPERATIONS Jun 18, 2024 Pending
Array ( [id] => 19851466 [patent_doc_number] => 20250096817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => METHOD AND APPARATUS FOR PERFORMING DATA ACCESS CONTROL FOR HOST DEVICE [patent_app_type] => utility [patent_app_number] => 18/740578 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740578 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740578
Method and apparatus for performing data access control for host device Jun 11, 2024 Issued
Array ( [id] => 19485270 [patent_doc_number] => 20240333312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => CAPACITY ACHIEVING MULTICARRIER MODULATION AND CODING SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/740416 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740416 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740416
Capacity achieving multicarrier modulation and coding systems and methods Jun 10, 2024 Issued
Array ( [id] => 20079223 [patent_doc_number] => 12353287 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Storing encoded data slices in primary storage slots [patent_app_type] => utility [patent_app_number] => 18/679623 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 5123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679623
Storing encoded data slices in primary storage slots May 30, 2024 Issued
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