Search

John G. Pickett

Supervisory Patent Examiner (ID: 13469, Phone: (571)272-4560 , Office: P/3728 )

Most Active Art Unit
3728
Art Unit(s)
3788, 3741, 3728, 3736, 3782
Total Applications
932
Issued Applications
383
Pending Applications
22
Abandoned Applications
527

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18400938 [patent_doc_number] => 11663076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Memory address protection [patent_app_type] => utility [patent_app_number] => 17/825352 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 8779 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825352
Memory address protection May 25, 2022 Issued
Array ( [id] => 20274069 [patent_doc_number] => 12443852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Method and related apparatus for signaling anomaly detection [patent_app_type] => utility [patent_app_number] => 17/752848 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 18174 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752848
Method and related apparatus for signaling anomaly detection May 23, 2022 Issued
Array ( [id] => 18508160 [patent_doc_number] => 11705992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Infrastructure equipment, wireless telecommunications system and method [patent_app_type] => utility [patent_app_number] => 17/750477 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7497 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750477
Infrastructure equipment, wireless telecommunications system and method May 22, 2022 Issued
Array ( [id] => 18561624 [patent_doc_number] => 11726867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Multi-page parity protection with power loss handling [patent_app_type] => utility [patent_app_number] => 17/741940 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 16156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741940
Multi-page parity protection with power loss handling May 10, 2022 Issued
Array ( [id] => 19167163 [patent_doc_number] => 11983066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Data storage device storing associated data in two areas [patent_app_type] => utility [patent_app_number] => 17/737689 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8578 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737689
Data storage device storing associated data in two areas May 4, 2022 Issued
Array ( [id] => 18346851 [patent_doc_number] => 20230134961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => BASE DIE, MEMORY SYSTEM, AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/661562 [patent_app_country] => US [patent_app_date] => 2022-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8554 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661562
Base die with error checking and correction , memory system, and semiconductor structure Apr 30, 2022 Issued
Array ( [id] => 18370708 [patent_doc_number] => 11650883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Batch rebuilding a set of encoded data slices [patent_app_type] => utility [patent_app_number] => 17/660890 [patent_app_country] => US [patent_app_date] => 2022-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9629 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660890
Batch rebuilding a set of encoded data slices Apr 26, 2022 Issued
Array ( [id] => 17781080 [patent_doc_number] => 20220247430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => APPARATUSES AND METHODS FOR PIPELINING MEMORY OPERATIONS WITH ERROR CORRECTION CODING [patent_app_type] => utility [patent_app_number] => 17/723277 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723277 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723277
Apparatuses and methods for pipelining memory operations with error correction coding Apr 17, 2022 Issued
Array ( [id] => 17934224 [patent_doc_number] => 20220329350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => APPARATUS AND METHOD FOR SUCCESSIVE CANCELLATION FLIP DECODING OF POLAR CODE [patent_app_type] => utility [patent_app_number] => 17/717766 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717766
Apparatus and method for successive cancellation flip decoding of polar code Apr 10, 2022 Issued
Array ( [id] => 17753498 [patent_doc_number] => 20220231703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => ERROR DETECTION IN COMMUNICATION SYSTEMS USING POLAR CODED DATA TRANSMISSION [patent_app_type] => utility [patent_app_number] => 17/717344 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717344
Error detection in communication systems using polar coded data transmission Apr 10, 2022 Issued
Array ( [id] => 17932292 [patent_doc_number] => 20220327417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SYSTEM, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/716961 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716961 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/716961
System of quantum processors, information processing method, and non-transitory storage medium thereof Apr 7, 2022 Issued
Array ( [id] => 17918852 [patent_doc_number] => 20220321248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => JOINT POLAR ENCODING OF MULTIPLE PAYLOADS WITH UNEQUAL ERROR PROTECTION [patent_app_type] => utility [patent_app_number] => 17/713945 [patent_app_country] => US [patent_app_date] => 2022-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17713945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/713945
Joint polar encoding of multiple payloads with unequal error protection Apr 4, 2022 Issued
Array ( [id] => 17738980 [patent_doc_number] => 20220224442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMANTIC NETWORK DATA CORRECTION [patent_app_type] => utility [patent_app_number] => 17/711503 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15662 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711503
Semantic network data correction Mar 31, 2022 Issued
Array ( [id] => 19212622 [patent_doc_number] => 12001685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Performing an in-line erasure coding process using a write-ahead log [patent_app_type] => utility [patent_app_number] => 17/710335 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7961 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/710335
Performing an in-line erasure coding process using a write-ahead log Mar 30, 2022 Issued
Array ( [id] => 18009690 [patent_doc_number] => 20220368457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Distributed Storage System Data Management And Security [patent_app_type] => utility [patent_app_number] => 17/707456 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707456 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/707456
Distributed Storage System Data Management And Security Mar 28, 2022 Abandoned
Array ( [id] => 19393598 [patent_doc_number] => 20240283468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => COMMUNICATION DEVICE AND COMMUNICATION METHOD [patent_app_type] => utility [patent_app_number] => 18/568057 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18568057 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/568057
COMMUNICATION DEVICE AND COMMUNICATION METHOD Feb 28, 2022 Pending
Array ( [id] => 20508339 [patent_doc_number] => 12542622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Cyclic redundancy check for staircase decoding procedures [patent_app_type] => utility [patent_app_number] => 18/715918 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 16329 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18715918 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/715918
Cyclic redundancy check for staircase decoding procedures Feb 24, 2022 Issued
Array ( [id] => 18571448 [patent_doc_number] => 20230261785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => POLAR CODING REED-MULLER NODE OPTIMIZATION USING FAST HADAMARD TRANSFORM [patent_app_type] => utility [patent_app_number] => 17/651058 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651058 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651058
Polar coding Reed-Muller node optimization using Fast Hadamard Transform Feb 13, 2022 Issued
Array ( [id] => 18553298 [patent_doc_number] => 20230251310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => SYSTEM AND METHOD FOR TESTING CLOCKING SYSTEMS IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/650263 [patent_app_country] => US [patent_app_date] => 2022-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17650263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/650263
System and method for testing clocking systems in integrated circuits Feb 7, 2022 Issued
Array ( [id] => 18539459 [patent_doc_number] => 20230244567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => HOST-LEVEL OUTER CODES [patent_app_type] => utility [patent_app_number] => 17/590129 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590129
Host-level outer codes Jan 31, 2022 Issued
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