Search

John J. Tabone Jr.

Examiner (ID: 1826, Phone: (571)272-3827 , Office: P/2117 )

Most Active Art Unit
2111
Art Unit(s)
2117, 2138, 2111, 2133
Total Applications
1411
Issued Applications
1231
Pending Applications
51
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16942240 [patent_doc_number] => 11054470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-06 [patent_title] => Double edge triggered Mux-D scan flip-flop [patent_app_type] => utility [patent_app_number] => 16/725689 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725689 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725689
Double edge triggered Mux-D scan flip-flop Dec 22, 2019 Issued
Array ( [id] => 16801338 [patent_doc_number] => 10996271 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Fast IJTAG [patent_app_type] => utility [patent_app_number] => 16/724295 [patent_app_country] => US [patent_app_date] => 2019-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8511 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724295 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724295
Fast IJTAG Dec 21, 2019 Issued
Array ( [id] => 17061928 [patent_doc_number] => 11106530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Parity protection [patent_app_type] => utility [patent_app_number] => 16/723836 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15182 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723836
Parity protection Dec 19, 2019 Issued
Array ( [id] => 16591777 [patent_doc_number] => 10901033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Channel circuitry, tap linking module, scan tap, debug tap domains [patent_app_type] => utility [patent_app_number] => 16/717236 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 4630 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717236
Channel circuitry, tap linking module, scan tap, debug tap domains Dec 16, 2019 Issued
Array ( [id] => 16550902 [patent_doc_number] => 10884057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => 3D tap and scan port architectures [patent_app_type] => utility [patent_app_number] => 16/710679 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 45 [patent_no_of_words] => 10127 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710679 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710679
3D tap and scan port architectures Dec 10, 2019 Issued
Array ( [id] => 16866514 [patent_doc_number] => 11025274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Memory controller and method of data bus inversion using an error detection correction code [patent_app_type] => utility [patent_app_number] => 16/690764 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690764
Memory controller and method of data bus inversion using an error detection correction code Nov 20, 2019 Issued
Array ( [id] => 15938593 [patent_doc_number] => 20200160930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => INFORMATION PROCESSING APPARATUS CAPABLE OF DETECTING ALTERATION IN SOFTWARE [patent_app_type] => utility [patent_app_number] => 16/684414 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684414 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684414
Information processing apparatus capable of detecting alteration in software Nov 13, 2019 Issued
Array ( [id] => 17325323 [patent_doc_number] => 11216335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Memory system and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/683989 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4841 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683989
Memory system and operation method thereof Nov 13, 2019 Issued
Array ( [id] => 17728903 [patent_doc_number] => 11385287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-12 [patent_title] => Method for adaptively utilizing programmable logic devices [patent_app_type] => utility [patent_app_number] => 16/684460 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684460
Method for adaptively utilizing programmable logic devices Nov 13, 2019 Issued
Array ( [id] => 16363213 [patent_doc_number] => 20200319964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/680838 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680838 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680838
Storage device and operating method thereof Nov 11, 2019 Issued
Array ( [id] => 18009696 [patent_doc_number] => 20220368463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => REDUNDANCY CONTROL FOR DATA TRAFFIC THROUGH A WIRELESS LINK [patent_app_type] => utility [patent_app_number] => 17/774371 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17774371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/774371
Redundancy control for data traffic through a wireless link Nov 5, 2019 Issued
Array ( [id] => 16424825 [patent_doc_number] => 20200350023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/673646 [patent_app_country] => US [patent_app_date] => 2019-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16673646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/673646
Memory controller and method of operating the same Nov 3, 2019 Issued
Array ( [id] => 16116561 [patent_doc_number] => 20200210303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => CONTROLLER AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/671853 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671853 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671853
Controller and operation method thereof Oct 31, 2019 Issued
Array ( [id] => 16988467 [patent_doc_number] => 11075653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Polar code encoding and decoding method and apparatus [patent_app_type] => utility [patent_app_number] => 16/671763 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 13786 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671763 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671763
Polar code encoding and decoding method and apparatus Oct 31, 2019 Issued
Array ( [id] => 16819696 [patent_doc_number] => 11004533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Memory device and built-in self test method thereof [patent_app_type] => utility [patent_app_number] => 16/671194 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671194 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671194
Memory device and built-in self test method thereof Oct 31, 2019 Issued
Array ( [id] => 16705547 [patent_doc_number] => 10955473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-23 [patent_title] => System and method of scan reset upon entering scan mode [patent_app_type] => utility [patent_app_number] => 16/672287 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/672287
System and method of scan reset upon entering scan mode Oct 31, 2019 Issued
Array ( [id] => 16803125 [patent_doc_number] => 10998076 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Signal calibration method used in memory apparatus [patent_app_type] => utility [patent_app_number] => 16/671362 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3161 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671362
Signal calibration method used in memory apparatus Oct 31, 2019 Issued
Array ( [id] => 15530791 [patent_doc_number] => 20200057701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => LAYERING A DISTRIBUTED STORAGE SYSTEM INTO STORAGE GROUPS AND VIRTUAL CHUNK SPACES FOR EFFICIENT DATA RECOVERY [patent_app_type] => utility [patent_app_number] => 16/665164 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6692 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665164 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665164
Layering a distributed storage system into storage groups and virtual chunk spaces for efficient data recovery Oct 27, 2019 Issued
Array ( [id] => 17230735 [patent_doc_number] => 20210357292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => DATA COMMUNICATION [patent_app_type] => utility [patent_app_number] => 17/287189 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17287189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/287189
Data communication Oct 10, 2019 Issued
Array ( [id] => 15349343 [patent_doc_number] => 20200012563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => MEMORY SYSTEM AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/577681 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577681
Memory system and operation method thereof Sep 19, 2019 Issued
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