
John J. Tabone Jr.
Examiner (ID: 1826, Phone: (571)272-3827 , Office: P/2117 )
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2117, 2138, 2111, 2133 |
| Total Applications | 1411 |
| Issued Applications | 1231 |
| Pending Applications | 51 |
| Abandoned Applications | 141 |
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