John J. Tabone Jr.

Array ( [id] => 15941123 [patent_doc_number] => 20200162195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => METHOD AND APPARATUS FOR CHANNEL ENCODING/DECODING IN COMMUNICATION OR BROADCAST SYSTEM [patent_app_type] => utility [patent_app_number] => 16/610491 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15283 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16610491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15954805 [patent_doc_number] => 10665315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Memory system and operating method of the same [patent_app_type] => utility [patent_app_number] => 15/968164 [patent_app_country] => US [patent_app_date] => 2018-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 16283 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15417021 [patent_doc_number] => 20200028833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => TRANSMITTING SURREPTITIOUS DATA ON AN EXISTING COMMUNICATION CHANNEL [patent_app_type] => utility [patent_app_number] => 15/962830 [patent_app_country] => US [patent_app_date] => 2018-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15962830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15545127 [patent_doc_number] => 10572344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Accessing error statistics from DRAM memories having integrated error correction [patent_app_type] => utility [patent_app_number] => 15/961010 [patent_app_country] => US [patent_app_date] => 2018-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2813 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15961010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13376261 [patent_doc_number] => 20180239672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => ERROR CODE CALCULATION ON SENSING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 15/959978 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15029915 [patent_doc_number] => 20190325962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => Error Detection and Correction Circuitry [patent_app_type] => utility [patent_app_number] => 15/959048 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17254703 [patent_doc_number] => 11190211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Method and device of selecting base graph of low-density parity-check code [patent_app_type] => utility [patent_app_number] => 16/610722 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 11001 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16610722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13510635 [patent_doc_number] => 20180306860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => DIGITAL INTEGRATED CIRCUIT PROTECTED FROM TRANSIENT ERRORS [patent_app_type] => utility [patent_app_number] => 15/954439 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14903823 [patent_doc_number] => 20190295677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => DETERMINING LINE FUNCTIONALITY ACCORDING TO LINE QUALITY IN NV STORAGE [patent_app_type] => utility [patent_app_number] => 15/933209 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15689615 [patent_doc_number] => 20200099471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SUB-BLOCK WISE INTERLEAVING FOR POLAR CODING SYSTEMS, PROCEDURES, AND SIGNALING [patent_app_type] => utility [patent_app_number] => 16/494666 [patent_app_country] => US [patent_app_date] => 2018-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16494666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14076755 [patent_doc_number] => 20190087265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 15/918021 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14921783 [patent_doc_number] => 10432226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Low density parity check encoder having length of 64800 and code rate of 5/15, and low density parity check encoding method using the same [patent_app_type] => utility [patent_app_number] => 15/907025 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6817 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 889 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15907025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14719847 [patent_doc_number] => 20190250987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => DATA STORAGE DEVICE EXTENDING ERASURES FOR LDPC-TYPE DECODING [patent_app_type] => utility [patent_app_number] => 15/895921 [patent_app_country] => US [patent_app_date] => 2018-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15895921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16036655 [patent_doc_number] => 10680764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Low-density parity check (LDPC) parity bit storage for redundancy versions [patent_app_type] => utility [patent_app_number] => 15/893428 [patent_app_country] => US [patent_app_date] => 2018-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15660 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15893428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12819949 [patent_doc_number] => 20180165155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => LAYERING A DISTRIBUTED STORAGE SYSTEM INTO STORAGE GROUPS AND VIRTUAL CHUNK SPACES FOR EFFICIENT DATA RECOVERY [patent_app_type] => utility [patent_app_number] => 15/890913 [patent_app_country] => US [patent_app_date] => 2018-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14693075 [patent_doc_number] => 20190245653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => POLAR CODE GENERATING METHOD, AND ELECTRONIC DEVICE AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM THEREFOR [patent_app_type] => utility [patent_app_number] => 15/890500 [patent_app_country] => US [patent_app_date] => 2018-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890500 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13394223 [patent_doc_number] => 20180248654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => APPARATUS AND METHODS OF SPECIFYING ORDERED SEQUENCES OF CODING SUB-CHANNELS [patent_app_type] => utility [patent_app_number] => 15/889544 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14655781 [patent_doc_number] => 20190235019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => MEMORY CIRCUIT MARCH TESTING [patent_app_type] => utility [patent_app_number] => 15/882674 [patent_app_country] => US [patent_app_date] => 2018-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12796801 [patent_doc_number] => 20180157436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => RESOURCE SHARING IN A TELECOMMUNICATIONS ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 15/874277 [patent_app_country] => US [patent_app_date] => 2018-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16485441 [patent_doc_number] => 20200379044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => IC Dies With Parallel PRBS Testing of Interposer [patent_app_type] => utility [patent_app_number] => 16/640255 [patent_app_country] => US [patent_app_date] => 2018-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16640255 [rel_patent_id] =>[rel_patent_doc_number] =>)