
John J. Tabone Jr.
Examiner (ID: 18928, Phone: (571)272-3827 , Office: P/2117 )
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2117, 2111, 2138, 2133 |
| Total Applications | 1407 |
| Issued Applications | 1231 |
| Pending Applications | 47 |
| Abandoned Applications | 141 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9507134
[patent_doc_number] => 08745464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-03
[patent_title] => 'Rank-specific cyclic redundancy check'
[patent_app_type] => utility
[patent_app_number] => 13/968266
[patent_app_country] => US
[patent_app_date] => 2013-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4156
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968266
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968266 | Rank-specific cyclic redundancy check | Aug 14, 2013 | Issued |
Array
(
[id] => 10901572
[patent_doc_number] => 08924816
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Method and system to improve the performance and/or reliability of a solid-state drive'
[patent_app_type] => utility
[patent_app_number] => 13/963930
[patent_app_country] => US
[patent_app_date] => 2013-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 6939
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13963930
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/963930 | Method and system to improve the performance and/or reliability of a solid-state drive | Aug 8, 2013 | Issued |
Array
(
[id] => 11741666
[patent_doc_number] => 09706272
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Bit-interleaver for an optical line terminal'
[patent_app_type] => utility
[patent_app_number] => 14/409421
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 6433
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14409421
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/409421 | Bit-interleaver for an optical line terminal | Jul 22, 2013 | Issued |
Array
(
[id] => 9163564
[patent_doc_number] => 20130311841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'SCAN TOPOLOGY DISCOVERY IN TARGET SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/948373
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8206
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948373
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948373 | Scan topology discovery in target systems | Jul 22, 2013 | Issued |
Array
(
[id] => 9507124
[patent_doc_number] => 08745453
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-06-03
[patent_title] => 'Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions'
[patent_app_type] => utility
[patent_app_number] => 13/947836
[patent_app_country] => US
[patent_app_date] => 2013-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 23
[patent_no_of_words] => 11312
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947836
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/947836 | Circuits, architectures, apparatuses, systems, methods, algorithms, software and firmware for using reserved cells to indicate defect positions | Jul 21, 2013 | Issued |
Array
(
[id] => 9160412
[patent_doc_number] => 20130308689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'RESOURCE SHARING IN A TELECOMMUNICATIONS ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 13/942938
[patent_app_country] => US
[patent_app_date] => 2013-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5421
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13942938
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/942938 | Resource sharing in a telecommunications environment | Jul 15, 2013 | Issued |
Array
(
[id] => 11738356
[patent_doc_number] => 09702932
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Arithmetic logic unit testing system and method'
[patent_app_type] => utility
[patent_app_number] => 14/411095
[patent_app_country] => US
[patent_app_date] => 2013-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 8491
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14411095
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/411095 | Arithmetic logic unit testing system and method | Jun 27, 2013 | Issued |
Array
(
[id] => 9096514
[patent_doc_number] => 20130275825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-17
[patent_title] => 'SEMICONDUCTOR TEST SYSTEM AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/909384
[patent_app_country] => US
[patent_app_date] => 2013-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 11492
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909384
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/909384 | Test circuitry including core output, expected response, and mask circuitry | Jun 3, 2013 | Issued |
Array
(
[id] => 9213989
[patent_doc_number] => 20140013166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-09
[patent_title] => 'POWER SAVING TECHNIQUES THAT USE A LOWER BOUND ON BIT ERRORS'
[patent_app_type] => utility
[patent_app_number] => 13/902410
[patent_app_country] => US
[patent_app_date] => 2013-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5910
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13902410
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/902410 | Power saving techniques that use a lower bound on bit errors | May 23, 2013 | Issued |
Array
(
[id] => 10015846
[patent_doc_number] => 09058867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Semiconductor device and driving method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/900578
[patent_app_country] => US
[patent_app_date] => 2013-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 12193
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900578
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/900578 | Semiconductor device and driving method thereof | May 22, 2013 | Issued |
Array
(
[id] => 10004764
[patent_doc_number] => 09048867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Shift register-based layered low density parity check decoder'
[patent_app_type] => utility
[patent_app_number] => 13/898685
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 9117
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898685
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898685 | Shift register-based layered low density parity check decoder | May 20, 2013 | Issued |
Array
(
[id] => 10914443
[patent_doc_number] => 20140317462
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-23
[patent_title] => 'SCANNABLE SEQUENTIAL ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 13/899486
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5339
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899486
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/899486 | SCANNABLE SEQUENTIAL ELEMENTS | May 20, 2013 | Abandoned |
Array
(
[id] => 9658780
[patent_doc_number] => 20140229785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'Method and apparatus for clock and data recovery'
[patent_app_type] => utility
[patent_app_number] => 13/898806
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7492
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898806
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898806 | Method and apparatus for clock and data recovery | May 20, 2013 | Issued |
Array
(
[id] => 9163572
[patent_doc_number] => 20130311849
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, ELECTRONIC SYSTEM, AND METHOD OF CONTROLLING ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/898548
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7123
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898548
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898548 | SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, ELECTRONIC SYSTEM, AND METHOD OF CONTROLLING ELECTRONIC DEVICE | May 20, 2013 | Abandoned |
Array
(
[id] => 10098794
[patent_doc_number] => 09135106
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-15
[patent_title] => 'Read level adjustment using soft information'
[patent_app_type] => utility
[patent_app_number] => 13/899447
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6388
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899447
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/899447 | Read level adjustment using soft information | May 20, 2013 | Issued |
Array
(
[id] => 9187177
[patent_doc_number] => 08627177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Retrieving data from a dispersed storage network in accordance with a retrieval threshold'
[patent_app_type] => utility
[patent_app_number] => 13/897567
[patent_app_country] => US
[patent_app_date] => 2013-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 27
[patent_no_of_words] => 25810
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897567
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/897567 | Retrieving data from a dispersed storage network in accordance with a retrieval threshold | May 19, 2013 | Issued |
Array
(
[id] => 10059086
[patent_doc_number] => 09098447
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-08-04
[patent_title] => 'Recovery of corrupted erasure-coded data files'
[patent_app_type] => utility
[patent_app_number] => 13/898071
[patent_app_country] => US
[patent_app_date] => 2013-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8814
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898071
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898071 | Recovery of corrupted erasure-coded data files | May 19, 2013 | Issued |
Array
(
[id] => 10059085
[patent_doc_number] => 09098446
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-08-04
[patent_title] => 'Recovery of corrupted erasure-coded data files'
[patent_app_type] => utility
[patent_app_number] => 13/898066
[patent_app_country] => US
[patent_app_date] => 2013-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8814
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 408
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898066
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/898066 | Recovery of corrupted erasure-coded data files | May 19, 2013 | Issued |
Array
(
[id] => 9392443
[patent_doc_number] => 08689067
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-04-01
[patent_title] => 'Control of clock gate cells during scan testing'
[patent_app_type] => utility
[patent_app_number] => 13/892700
[patent_app_country] => US
[patent_app_date] => 2013-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 2983
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892700
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/892700 | Control of clock gate cells during scan testing | May 12, 2013 | Issued |
Array
(
[id] => 9044231
[patent_doc_number] => 20130246869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'ENHANCED DIAGNOSIS WITH LIMITED FAILURE CYCLES'
[patent_app_type] => utility
[patent_app_number] => 13/888227
[patent_app_country] => US
[patent_app_date] => 2013-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 12579
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888227
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/888227 | Enhanced diagnosis with limited failure cycles | May 5, 2013 | Issued |