Search

John J. Tabone Jr.

Examiner (ID: 18928, Phone: (571)272-3827 , Office: P/2117 )

Most Active Art Unit
2111
Art Unit(s)
2117, 2111, 2138, 2133
Total Applications
1407
Issued Applications
1231
Pending Applications
47
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9036312 [patent_doc_number] => 20130238950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'DECODING APPARATUS AND DECODING METHOD FOR DECODING LDPC-ENCODED DATA' [patent_app_type] => utility [patent_app_number] => 13/871901 [patent_app_country] => US [patent_app_date] => 2013-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7082 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13871901 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/871901
Decoding apparatus and decoding method for decoding LDPC-encoded data Apr 25, 2013 Issued
Array ( [id] => 9036311 [patent_doc_number] => 20130238949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'SEMICONDUCTOR TEST SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/870238 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11483 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870238 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870238
Output circuitry with tri-state buffer and comparator circuitry Apr 24, 2013 Issued
Array ( [id] => 9314999 [patent_doc_number] => 08656234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Test port connected to master output of override selection logic' [patent_app_type] => utility [patent_app_number] => 13/859968 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4734 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859968 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859968
Test port connected to master output of override selection logic Apr 9, 2013 Issued
Array ( [id] => 11644046 [patent_doc_number] => 09665422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Information processing apparatus and method, and, program' [patent_app_type] => utility [patent_app_number] => 14/390817 [patent_app_country] => US [patent_app_date] => 2013-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 13721 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14390817 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/390817
Information processing apparatus and method, and, program Apr 3, 2013 Issued
Array ( [id] => 9746114 [patent_doc_number] => 20140281833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF IN-BAND ON-CHANNEL RADIO SIGNALS INCLUDING COMPLEMENTARY LOW DENSITY PARITY CHECK CODING' [patent_app_type] => utility [patent_app_number] => 13/835011 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8096 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835011
Method and apparatus for transmission and reception of in-band on-channel radio signals including complementary low density parity check coding Mar 14, 2013 Issued
Array ( [id] => 10015252 [patent_doc_number] => 09058266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Deskew apparatus and method for peripheral component interconnect express' [patent_app_type] => utility [patent_app_number] => 13/835084 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835084
Deskew apparatus and method for peripheral component interconnect express Mar 14, 2013 Issued
Array ( [id] => 9451807 [patent_doc_number] => 20140122977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'VARIABLE CONTROL FOR A FORWARD ERROR CORRECTION CAPABILITY' [patent_app_type] => utility [patent_app_number] => 13/834212 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834212
VARIABLE CONTROL FOR A FORWARD ERROR CORRECTION CAPABILITY Mar 14, 2013 Abandoned
Array ( [id] => 9365396 [patent_doc_number] => 20140075269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'Method for Optimizing the Forward Error Correction Scheme' [patent_app_type] => utility [patent_app_number] => 13/830458 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3133 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830458 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830458
Method for Optimizing the Forward Error Correction Scheme Mar 13, 2013 Abandoned
Array ( [id] => 9002436 [patent_doc_number] => 20130223561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'LDPC coding systems for 60 GHz millimeter wave based physical layer extension' [patent_app_type] => utility [patent_app_number] => 13/780947 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780947 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/780947
LDPC coding systems for 60 GHz millimeter wave based physical layer extension Feb 27, 2013 Issued
Array ( [id] => 9673442 [patent_doc_number] => 20140237305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'APPARATUSES AND METHODS FOR COMPRESSING DATA RECEIVED OVER MULTIPLE MEMORY ACCESSES' [patent_app_type] => utility [patent_app_number] => 13/771838 [patent_app_country] => US [patent_app_date] => 2013-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5648 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13771838 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/771838
Apparatuses and methods for compressing data received over multiple memory accesses Feb 19, 2013 Issued
Array ( [id] => 10461262 [patent_doc_number] => 20150346277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR STATE RETENTION' [patent_app_type] => utility [patent_app_number] => 14/655057 [patent_app_country] => US [patent_app_date] => 2013-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3537 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14655057 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/655057
Electronic device and method for state retention Jan 8, 2013 Issued
Array ( [id] => 9236012 [patent_doc_number] => 08601328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-03 [patent_title] => 'Systems and methods for near-codeword detection and correction on the fly' [patent_app_type] => utility [patent_app_number] => 13/728524 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 14733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13728524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/728524
Systems and methods for near-codeword detection and correction on the fly Dec 26, 2012 Issued
Array ( [id] => 8906453 [patent_doc_number] => 20130173956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'USING PARITY DATA FOR CONCURRENT DATA AUTHENTICATION, CORRECTION, COMPRESSION, AND ENCRYPTION' [patent_app_type] => utility [patent_app_number] => 13/727581 [patent_app_country] => US [patent_app_date] => 2012-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 30581 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727581 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/727581
Using parity data for concurrent data authentication, correction, compression, and encryption Dec 25, 2012 Issued
Array ( [id] => 12357111 [patent_doc_number] => 09954555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Method and apparatus for selective error correction coding [patent_app_type] => utility [patent_app_number] => 14/653093 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7370 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14653093 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/653093
Method and apparatus for selective error correction coding Dec 17, 2012 Issued
Array ( [id] => 8782020 [patent_doc_number] => 20130103995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'BLOCKING THE EFFECTS OF SCAN CHAIN TESTING UPON A CHANGE IN SCAN CHAIN TOPOLOGY' [patent_app_type] => utility [patent_app_number] => 13/712214 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4696 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13712214 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/712214
Select, override and master override controlling multiplexing TDI and TDO Dec 11, 2012 Issued
Array ( [id] => 8782012 [patent_doc_number] => 20130103987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'On-Die Logic Analyzer For Semiconductor Die' [patent_app_type] => utility [patent_app_number] => 13/710919 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710919 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710919
On-die logic analyzer for semiconductor die Dec 10, 2012 Issued
Array ( [id] => 8735284 [patent_doc_number] => 20130080853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'SYSTEM AND METHOD OF DATA ENCODING' [patent_app_type] => utility [patent_app_number] => 13/673543 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/673543
System and method of data encoding Nov 8, 2012 Issued
Array ( [id] => 9130297 [patent_doc_number] => 08578254 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-05 [patent_title] => 'Modified trace-back using soft output Viterbi algorithm (SOVA)' [patent_app_type] => utility [patent_app_number] => 13/669846 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8307 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13669846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/669846
Modified trace-back using soft output Viterbi algorithm (SOVA) Nov 5, 2012 Issued
Array ( [id] => 9049218 [patent_doc_number] => 08543776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'On-die logic analyzer for semiconductor die' [patent_app_type] => utility [patent_app_number] => 13/665198 [patent_app_country] => US [patent_app_date] => 2012-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5452 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13665198 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/665198
On-die logic analyzer for semiconductor die Oct 30, 2012 Issued
Array ( [id] => 9143507 [patent_doc_number] => 08583989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Fibre channel input/output data routing system and method' [patent_app_type] => utility [patent_app_number] => 13/657068 [patent_app_country] => US [patent_app_date] => 2012-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 22821 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 414 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13657068 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/657068
Fibre channel input/output data routing system and method Oct 21, 2012 Issued
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