Search

John J. Vrablik

Examiner (ID: 17138)

Most Active Art Unit
3403
Art Unit(s)
3502, 3504, 3748, 2102, 3403, 3746
Total Applications
2337
Issued Applications
2043
Pending Applications
54
Abandoned Applications
240

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7807665 [patent_doc_number] => 20120058619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'NAND FLASH MEMORY ARRAY HAVING PILLAR STRUCTURE AND FABRICATING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/222246 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4991 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20120058619.pdf [firstpage_image] =>[orig_patent_app_number] => 13222246 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/222246
NAND flash memory array having pillar structure and fabricating method of the same Aug 30, 2011 Issued
Array ( [id] => 8244837 [patent_doc_number] => 08202762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Stack package having reduced electrical connection length suitable for high speed operations and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/218916 [patent_app_country] => US [patent_app_date] => 2011-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3192 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/202/08202762.pdf [firstpage_image] =>[orig_patent_app_number] => 13218916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218916
Stack package having reduced electrical connection length suitable for high speed operations and method of manufacturing the same Aug 25, 2011 Issued
Array ( [id] => 8785185 [patent_doc_number] => 08432030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Power electronic package having two substrates with multiple semiconductor chips and electronic components' [patent_app_type] => utility [patent_app_number] => 13/171788 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 87 [patent_no_of_words] => 12273 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13171788 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171788
Power electronic package having two substrates with multiple semiconductor chips and electronic components Jun 28, 2011 Issued
Array ( [id] => 6256341 [patent_doc_number] => 20100295179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-25 [patent_title] => 'BGA SEMICONDUCTOR DEVICE HAVING A DUMMY BUMP' [patent_app_type] => utility [patent_app_number] => 12/846120 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5564 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0295/20100295179.pdf [firstpage_image] =>[orig_patent_app_number] => 12846120 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846120
BGA semiconductor device having a dummy bump Jul 28, 2010 Issued
Array ( [id] => 6511681 [patent_doc_number] => 20100230143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'ELECTRICAL INTERCONNECT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/787485 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5292 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20100230143.pdf [firstpage_image] =>[orig_patent_app_number] => 12787485 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787485
Electrical interconnect structure May 25, 2010 Issued
Array ( [id] => 8340087 [patent_doc_number] => 08242010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Electrical interconnect forming method' [patent_app_type] => utility [patent_app_number] => 12/787503 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 30 [patent_no_of_words] => 5300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12787503 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787503
Electrical interconnect forming method May 25, 2010 Issued
Array ( [id] => 8528316 [patent_doc_number] => 08304889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Power semiconductor module and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/732238 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 5001 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12732238 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/732238
Power semiconductor module and fabrication method thereof Mar 25, 2010 Issued
Array ( [id] => 7666703 [patent_doc_number] => 20110315972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'ORGANIC ELECTRONIC ELEMENT AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 13/254886 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 14892 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13254886 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/254886
Organic electronic element and its manufacturing method Mar 2, 2010 Issued
Array ( [id] => 6114431 [patent_doc_number] => 20110073961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'SELF-ALIGNED WELL IMPLANT FOR IMPROVING SHORT CHANNEL EFFECTS CONTROL, PARASITIC CAPACITANCE, AND JUNCTION LEAKAGE' [patent_app_type] => utility [patent_app_number] => 12/568287 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20110073961.pdf [firstpage_image] =>[orig_patent_app_number] => 12568287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/568287
Self-aligned well implant for improving short channel effects control, parasitic capacitance, and junction leakage Sep 27, 2009 Issued
Array ( [id] => 6470194 [patent_doc_number] => 20100207142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'LIGHT-EMITTING DIODE LIGHT SOURCE MODULE' [patent_app_type] => utility [patent_app_number] => 12/567806 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207142.pdf [firstpage_image] =>[orig_patent_app_number] => 12567806 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567806
Light-emitting diode light source module Sep 27, 2009 Issued
Array ( [id] => 6358816 [patent_doc_number] => 20100078786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'WIRING SUBSTRATE WITH REINFORCEMENT' [patent_app_type] => utility [patent_app_number] => 12/568185 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8311 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078786.pdf [firstpage_image] =>[orig_patent_app_number] => 12568185 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/568185
Wiring substrate with reinforcement Sep 27, 2009 Issued
Array ( [id] => 8317339 [patent_doc_number] => 08232115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Test structure for determination of TSV depth' [patent_app_type] => utility [patent_app_number] => 12/566726 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4753 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12566726 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/566726
Test structure for determination of TSV depth Sep 24, 2009 Issued
Array ( [id] => 6358711 [patent_doc_number] => 20100078773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Semiconductor device and method of forming semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/585825 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078773.pdf [firstpage_image] =>[orig_patent_app_number] => 12585825 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585825
Semiconductor device and method of forming semiconductor device Sep 24, 2009 Abandoned
Array ( [id] => 6417067 [patent_doc_number] => 20100276750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'Metal Oxide Semiconductor (MOS) Structure and Manufacturing Method Thereof' [patent_app_type] => utility [patent_app_number] => 12/567194 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4292 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20100276750.pdf [firstpage_image] =>[orig_patent_app_number] => 12567194 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567194
Metal oxide semiconductor (MOS) structure and manufacturing method thereof Sep 24, 2009 Issued
Array ( [id] => 8834430 [patent_doc_number] => 08450186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Optical modulator utilizing wafer bonding technology' [patent_app_type] => utility [patent_app_number] => 12/567645 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4161 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12567645 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567645
Optical modulator utilizing wafer bonding technology Sep 24, 2009 Issued
Array ( [id] => 6358037 [patent_doc_number] => 20100078659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Light-emitting element' [patent_app_type] => utility [patent_app_number] => 12/585827 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10064 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078659.pdf [firstpage_image] =>[orig_patent_app_number] => 12585827 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585827
Light-emitting element Sep 24, 2009 Issued
Array ( [id] => 6358262 [patent_doc_number] => 20100078706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/585826 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8027 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078706.pdf [firstpage_image] =>[orig_patent_app_number] => 12585826 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585826
Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device Sep 24, 2009 Abandoned
Array ( [id] => 5395105 [patent_doc_number] => 20090315168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'THROUGH BOARD STACKING OF MULTIPLE LGA-CONNECTED COMPONENTS' [patent_app_type] => utility [patent_app_number] => 12/543104 [patent_app_country] => US [patent_app_date] => 2009-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4365 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315168.pdf [firstpage_image] =>[orig_patent_app_number] => 12543104 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/543104
Through board stacking of multiple LGA-connected components Aug 17, 2009 Issued
Array ( [id] => 5300294 [patent_doc_number] => 20090294946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Package-Borne Selective Enablement Stacking' [patent_app_type] => utility [patent_app_number] => 12/437268 [patent_app_country] => US [patent_app_date] => 2009-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2533 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294946.pdf [firstpage_image] =>[orig_patent_app_number] => 12437268 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/437268
Package-Borne Selective Enablement Stacking May 6, 2009 Abandoned
Array ( [id] => 5315413 [patent_doc_number] => 20090280011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'Blade arrangement' [patent_app_type] => utility [patent_app_number] => 12/386000 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6033 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20090280011.pdf [firstpage_image] =>[orig_patent_app_number] => 12386000 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/386000
Blade arrangement Apr 26, 2009 Issued
Menu