John J. Zimmerman

Array ( [id] => 17810840 [patent_doc_number] => 20220262675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => Interconnect Structure without Barrier Layer on Bottom Surface of Via [patent_app_type] => utility [patent_app_number] => 17/734683 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19830055 [patent_doc_number] => 12250863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => OLED display panel and OLED display device [patent_app_type] => utility [patent_app_number] => 17/729695 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729695 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18243079 [patent_doc_number] => 20230075390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METHOD OF FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/726673 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17726673 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17959835 [patent_doc_number] => 20220340415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => METHOD FOR ETCHING GAPS OF UNEQUAL WIDTH [patent_app_type] => utility [patent_app_number] => 17/725430 [patent_app_country] => US [patent_app_date] => 2022-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19110243 [patent_doc_number] => 11963377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Light-emitting diode light extraction layer having graded index of refraction [patent_app_type] => utility [patent_app_number] => 17/710939 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5189 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18347235 [patent_doc_number] => 20230135345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => METHOD FOR PRODUCING INK COMPOSITION [patent_app_type] => utility [patent_app_number] => 17/802517 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20133969 [patent_doc_number] => 12376300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Method for manufacturing semiconductor device and method for processing film [patent_app_type] => utility [patent_app_number] => 17/687166 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 36 [patent_no_of_words] => 2267 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18586010 [patent_doc_number] => 20230268275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => RESIST PATTERNED REDISTRIBUTION WIRING ON COPPER POLYIMIDE VIA LAYER [patent_app_type] => utility [patent_app_number] => 17/651883 [patent_app_country] => US [patent_app_date] => 2022-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17630645 [patent_doc_number] => 20220165660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => METHOD OF BACK END OF LINE VIA TO METAL LINE MARGIN IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 17/667488 [patent_app_country] => US [patent_app_date] => 2022-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17615664 [patent_doc_number] => 20220157944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => WAFER AND METHOD OF MANUFACTURING WAFER [patent_app_type] => utility [patent_app_number] => 17/665166 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17665166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18534980 [patent_doc_number] => 20230240061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => METHOD OF MANUFACTURING MEMORY DEVICE HAVING MEMORY CELL WITH REDUCED PROTRUSION [patent_app_type] => utility [patent_app_number] => 17/582551 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19054712 [patent_doc_number] => 20240096681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => WAFER ASSEMBLY AND METHOD FOR PRODUCING A PLURALITY OF SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 18/263240 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18263240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17870745 [patent_doc_number] => 20220293482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/555790 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19958613 [patent_doc_number] => 12329044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Applying inert ion beam etching for improving a profile and repairing sidewall damage for phase change memory devices [patent_app_type] => utility [patent_app_number] => 17/456402 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19597148 [patent_doc_number] => 12155002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Method for optimizing the electric conduction through a metal/oxide/metal interface [patent_app_type] => utility [patent_app_number] => 17/456052 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3905 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19428150 [patent_doc_number] => 12087583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 17/455717 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3707 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19671059 [patent_doc_number] => 12183832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/521021 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 60 [patent_no_of_words] => 25625 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19093918 [patent_doc_number] => 11955383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/453851 [patent_app_country] => US [patent_app_date] => 2021-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3760 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17566565 [patent_doc_number] => 20220130714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => INTERCONNECT STRUCTURES AND METHODS FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 17/517247 [patent_app_country] => US [patent_app_date] => 2021-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18410638 [patent_doc_number] => 20230171991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE THEREOF [patent_app_type] => utility [patent_app_number] => 17/921213 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17921213 [rel_patent_id] =>[rel_patent_doc_number] =>)