Search

John James Calvert

Examiner (ID: 2476)

Most Active Art Unit
2407
Art Unit(s)
2899, 2407, 3765, 3408, 3741, 3102
Total Applications
1069
Issued Applications
985
Pending Applications
12
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10416936 [patent_doc_number] => 20150301946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'Page Compressibility Checker' [patent_app_type] => utility [patent_app_number] => 14/254696 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6360 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14254696 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/254696
Page compressibility checker Apr 15, 2014 Issued
Array ( [id] => 10922145 [patent_doc_number] => 20140325165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'MEMORY APPARATUS AND MEMORY MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 14/254527 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5115 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14254527 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/254527
MEMORY APPARATUS AND MEMORY MANAGEMENT METHOD Apr 15, 2014 Abandoned
Array ( [id] => 10956205 [patent_doc_number] => 20140359228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'CACHE ALLOCATION IN A COMPUTERIZED SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/253962 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7498 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14253962 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/253962
CACHE ALLOCATION IN A COMPUTERIZED SYSTEM Apr 15, 2014 Abandoned
Array ( [id] => 9774311 [patent_doc_number] => 20140297973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'STORAGE SYSTEM AND INFORMATION PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/179984 [patent_app_country] => US [patent_app_date] => 2014-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9580 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14179984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/179984
Storage system and information processing apparatus Feb 12, 2014 Issued
Array ( [id] => 12570753 [patent_doc_number] => 10019167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Non-Uniform Memory Access (NUMA) resource assignment and re-evaluation [patent_app_type] => utility [patent_app_number] => 14/178810 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178810 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/178810
Non-Uniform Memory Access (NUMA) resource assignment and re-evaluation Feb 11, 2014 Issued
Array ( [id] => 13054965 [patent_doc_number] => 10048871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Assigning pre-existing processes to select sets of non-uniform memory access (NUMA) aligned resources [patent_app_type] => utility [patent_app_number] => 14/178808 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178808 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/178808
Assigning pre-existing processes to select sets of non-uniform memory access (NUMA) aligned resources Feb 11, 2014 Issued
Array ( [id] => 9774284 [patent_doc_number] => 20140297947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-02 [patent_title] => 'STORAGE SYSTEM, STORAGE APPARATUS, CONTROL METHOD OF STORAGE SYSTEM, AND COMPUTER PRODUCT' [patent_app_type] => utility [patent_app_number] => 14/174890 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12840 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14174890 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/174890
STORAGE SYSTEM, STORAGE APPARATUS, CONTROL METHOD OF STORAGE SYSTEM, AND COMPUTER PRODUCT Feb 6, 2014 Abandoned
Array ( [id] => 10342458 [patent_doc_number] => 20150227463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'PRECACHING OF RESPONSIVE INFORMATION' [patent_app_type] => utility [patent_app_number] => 14/176031 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 15753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176031 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176031
PRECACHING OF RESPONSIVE INFORMATION Feb 6, 2014 Abandoned
Array ( [id] => 10336347 [patent_doc_number] => 20150221352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING E-FUSE ARRAYS' [patent_app_type] => utility [patent_app_number] => 14/174653 [patent_app_country] => US [patent_app_date] => 2014-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14174653 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/174653
SEMICONDUCTOR DEVICES INCLUDING E-FUSE ARRAYS Feb 5, 2014 Abandoned
Array ( [id] => 12255855 [patent_doc_number] => 09927998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'Flash memory compression' [patent_app_type] => utility [patent_app_number] => 14/173586 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173586
Flash memory compression Feb 4, 2014 Issued
Array ( [id] => 12229009 [patent_doc_number] => 09916253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Method and apparatus for supporting a plurality of load accesses of a cache in a single cycle to maintain throughput' [patent_app_type] => utility [patent_app_number] => 14/173602 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9186 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173602 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173602
Method and apparatus for supporting a plurality of load accesses of a cache in a single cycle to maintain throughput Feb 4, 2014 Issued
Array ( [id] => 10335267 [patent_doc_number] => 20150220272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'INCREASING DATA STORAGE CAPACITY' [patent_app_type] => utility [patent_app_number] => 14/173209 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173209 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173209
Increasing data storage capacity Feb 4, 2014 Issued
Array ( [id] => 10816025 [patent_doc_number] => 20160162187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'Storage System And Method For Processing Writing Data Of Storage System' [patent_app_type] => utility [patent_app_number] => 14/785073 [patent_app_country] => US [patent_app_date] => 2014-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7769 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785073 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/785073
Storage System And Method For Processing Writing Data Of Storage System Jan 28, 2014 Abandoned
Array ( [id] => 11700600 [patent_doc_number] => 09690515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Delayed automation to maximize the utilization of read and write cache' [patent_app_type] => utility [patent_app_number] => 14/063637 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 14993 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14063637 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/063637
Delayed automation to maximize the utilization of read and write cache Oct 24, 2013 Issued
Array ( [id] => 9866647 [patent_doc_number] => 20150046666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/063159 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14063159 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/063159
Memory system Oct 24, 2013 Issued
Array ( [id] => 10976947 [patent_doc_number] => 20140379982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/064015 [patent_app_country] => US [patent_app_date] => 2013-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064015 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064015
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME Oct 24, 2013 Abandoned
Array ( [id] => 9308506 [patent_doc_number] => 20140047180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'METHOD, DEVICE, AND SYSTEM FOR DETERMINING DRIVE LETTER' [patent_app_type] => utility [patent_app_number] => 14/061501 [patent_app_country] => US [patent_app_date] => 2013-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14471 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14061501 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/061501
Method, device, and system for determining drive letter Oct 22, 2013 Issued
Array ( [id] => 9548539 [patent_doc_number] => 20140173187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'VIRTUAL BOUNDARY CODES IN A DATA IMAGE OF A READ-WRITE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/060736 [patent_app_country] => US [patent_app_date] => 2013-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14060736 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/060736
VIRTUAL BOUNDARY CODES IN A DATA IMAGE OF A READ-WRITE MEMORY DEVICE Oct 22, 2013 Abandoned
Array ( [id] => 9437364 [patent_doc_number] => 20140115272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'Deadlock-Avoiding Coherent System On Chip Interconnect' [patent_app_type] => utility [patent_app_number] => 14/059732 [patent_app_country] => US [patent_app_date] => 2013-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6417 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14059732 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/059732
Deadlock-avoiding coherent system on chip interconnect Oct 21, 2013 Issued
Array ( [id] => 12331983 [patent_doc_number] => 09946655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Storage system and storage control method [patent_app_type] => utility [patent_app_number] => 14/765442 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 14679 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 781 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14765442 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/765442
Storage system and storage control method Oct 8, 2013 Issued
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