
John Kwon
Examiner (ID: 4120, Phone: (571)272-4846 , Office: P/3747 )
| Most Active Art Unit | 3747 |
| Art Unit(s) | 3401, 2403, 3622, 2402, 3747, 3404, 2605, 3745, 3754 |
| Total Applications | 4775 |
| Issued Applications | 4290 |
| Pending Applications | 87 |
| Abandoned Applications | 420 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3821546
[patent_doc_number] => 05770891
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Socket for semi-permanently connecting a solder ball grid array device using a dendrite interposer'
[patent_app_type] => 1
[patent_app_number] => 8/718120
[patent_app_country] => US
[patent_app_date] => 1996-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3485
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/770/05770891.pdf
[firstpage_image] =>[orig_patent_app_number] => 718120
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/718120 | Socket for semi-permanently connecting a solder ball grid array device using a dendrite interposer | Sep 17, 1996 | Issued |
Array
(
[id] => 3788129
[patent_doc_number] => 05821569
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Surface-emission type light-emitting diode and fabrication process therefor'
[patent_app_type] => 1
[patent_app_number] => 8/706517
[patent_app_country] => US
[patent_app_date] => 1996-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 22
[patent_no_of_words] => 6857
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821569.pdf
[firstpage_image] =>[orig_patent_app_number] => 706517
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/706517 | Surface-emission type light-emitting diode and fabrication process therefor | Sep 3, 1996 | Issued |
Array
(
[id] => 3835873
[patent_doc_number] => 05739575
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Dielectrically isolated substrate and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/705647
[patent_app_country] => US
[patent_app_date] => 1996-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 5645
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/739/05739575.pdf
[firstpage_image] =>[orig_patent_app_number] => 705647
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/705647 | Dielectrically isolated substrate and method for manufacturing the same | Aug 29, 1996 | Issued |
Array
(
[id] => 3984636
[patent_doc_number] => 05949095
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Enhancement type MESFET'
[patent_app_type] => 1
[patent_app_number] => 8/689661
[patent_app_country] => US
[patent_app_date] => 1996-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 6075
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/949/05949095.pdf
[firstpage_image] =>[orig_patent_app_number] => 689661
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/689661 | Enhancement type MESFET | Aug 12, 1996 | Issued |
Array
(
[id] => 3780610
[patent_doc_number] => 05808366
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'Integrated circuits, and methods of fabricating same, which take into account capacitive loading by the integrated circuit potting material'
[patent_app_type] => 1
[patent_app_number] => 8/694541
[patent_app_country] => US
[patent_app_date] => 1996-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2753
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/808/05808366.pdf
[firstpage_image] =>[orig_patent_app_number] => 694541
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/694541 | Integrated circuits, and methods of fabricating same, which take into account capacitive loading by the integrated circuit potting material | Aug 8, 1996 | Issued |
Array
(
[id] => 4243479
[patent_doc_number] => 06091079
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-18
[patent_title] => 'Semiconductor wafer'
[patent_app_type] => 1
[patent_app_number] => 8/698171
[patent_app_country] => US
[patent_app_date] => 1996-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 4071
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/091/06091079.pdf
[firstpage_image] =>[orig_patent_app_number] => 698171
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/698171 | Semiconductor wafer | Aug 1, 1996 | Issued |
Array
(
[id] => 3651782
[patent_doc_number] => 05629534
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-13
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/691416
[patent_app_country] => US
[patent_app_date] => 1996-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 26
[patent_no_of_words] => 9865
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/629/05629534.pdf
[firstpage_image] =>[orig_patent_app_number] => 691416
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/691416 | Semiconductor device | Aug 1, 1996 | Issued |
Array
(
[id] => 3780128
[patent_doc_number] => 05757046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'MOS type semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/691502
[patent_app_country] => US
[patent_app_date] => 1996-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 25
[patent_no_of_words] => 7193
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/757/05757046.pdf
[firstpage_image] =>[orig_patent_app_number] => 691502
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/691502 | MOS type semiconductor device | Aug 1, 1996 | Issued |
Array
(
[id] => 3728201
[patent_doc_number] => 05672898
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-30
[patent_title] => 'Platinum silicide Schottky diodes in a titanium-silicided CMOS-based high performance BICMOS process'
[patent_app_type] => 1
[patent_app_number] => 8/684869
[patent_app_country] => US
[patent_app_date] => 1996-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 6405
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/672/05672898.pdf
[firstpage_image] =>[orig_patent_app_number] => 684869
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/684869 | Platinum silicide Schottky diodes in a titanium-silicided CMOS-based high performance BICMOS process | Jul 24, 1996 | Issued |
| 08/681101 | SILICON CARBIDE FIELD EFFECT TRANSISTOR WITH INCREASED AVALANCHE WITHSTAND CAPABILITY | Jul 21, 1996 | Abandoned |
Array
(
[id] => 3918184
[patent_doc_number] => 06002159
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-14
[patent_title] => 'SiC semiconductor device comprising a pn junction with a voltage absorbing edge'
[patent_app_type] => 1
[patent_app_number] => 8/683059
[patent_app_country] => US
[patent_app_date] => 1996-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 12
[patent_no_of_words] => 4613
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/002/06002159.pdf
[firstpage_image] =>[orig_patent_app_number] => 683059
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/683059 | SiC semiconductor device comprising a pn junction with a voltage absorbing edge | Jul 15, 1996 | Issued |
Array
(
[id] => 3834092
[patent_doc_number] => 05760426
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Heteroepitaxial semiconductor device including silicon substrate, GaAs layer and GaN layer #13'
[patent_app_type] => 1
[patent_app_number] => 8/680850
[patent_app_country] => US
[patent_app_date] => 1996-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 7429
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/760/05760426.pdf
[firstpage_image] =>[orig_patent_app_number] => 680850
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/680850 | Heteroepitaxial semiconductor device including silicon substrate, GaAs layer and GaN layer #13 | Jul 15, 1996 | Issued |
Array
(
[id] => 3754385
[patent_doc_number] => 05801836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Depletion region stopper for PN junction in silicon carbide'
[patent_app_type] => 1
[patent_app_number] => 8/680921
[patent_app_country] => US
[patent_app_date] => 1996-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 16
[patent_no_of_words] => 5297
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801836.pdf
[firstpage_image] =>[orig_patent_app_number] => 680921
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/680921 | Depletion region stopper for PN junction in silicon carbide | Jul 15, 1996 | Issued |
Array
(
[id] => 3766447
[patent_doc_number] => 05852304
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Optical communication system'
[patent_app_type] => 1
[patent_app_number] => 8/687013
[patent_app_country] => US
[patent_app_date] => 1996-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 29
[patent_no_of_words] => 4688
[patent_no_of_claims] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/852/05852304.pdf
[firstpage_image] =>[orig_patent_app_number] => 687013
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/687013 | Optical communication system | Jul 15, 1996 | Issued |
Array
(
[id] => 3633127
[patent_doc_number] => 05686743
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Method of forming airbridged metallization for integrated circuit fabrication'
[patent_app_type] => 1
[patent_app_number] => 8/679637
[patent_app_country] => US
[patent_app_date] => 1996-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2529
[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686743.pdf
[firstpage_image] =>[orig_patent_app_number] => 679637
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/679637 | Method of forming airbridged metallization for integrated circuit fabrication | Jul 9, 1996 | Issued |
Array
(
[id] => 4054093
[patent_doc_number] => 05869870
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Electrostatic discharge (ESD) protective device for integrated circuit packages with no-connect pins'
[patent_app_type] => 1
[patent_app_number] => 8/677109
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[patent_app_date] => 1996-07-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/869/05869870.pdf
[firstpage_image] =>[orig_patent_app_number] => 677109
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/677109 | Electrostatic discharge (ESD) protective device for integrated circuit packages with no-connect pins | Jul 8, 1996 | Issued |
Array
(
[id] => 3787958
[patent_doc_number] => 05821557
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Josephson junctions and process for making same'
[patent_app_type] => 1
[patent_app_number] => 8/676477
[patent_app_country] => US
[patent_app_date] => 1996-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821557.pdf
[firstpage_image] =>[orig_patent_app_number] => 676477
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/676477 | Josephson junctions and process for making same | Jul 7, 1996 | Issued |
Array
(
[id] => 4111260
[patent_doc_number] => 06023079
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-08
[patent_title] => 'Compound semiconductor memory with floating gate'
[patent_app_type] => 1
[patent_app_number] => 8/677347
[patent_app_country] => US
[patent_app_date] => 1996-07-02
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/023/06023079.pdf
[firstpage_image] =>[orig_patent_app_number] => 677347
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/677347 | Compound semiconductor memory with floating gate | Jul 1, 1996 | Issued |
Array
(
[id] => 3668600
[patent_doc_number] => 05668381
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-16
[patent_title] => 'Thin film transistor array panel for a liquid crystal display'
[patent_app_type] => 1
[patent_app_number] => 8/670031
[patent_app_country] => US
[patent_app_date] => 1996-06-25
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/668/05668381.pdf
[firstpage_image] =>[orig_patent_app_number] => 670031
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/670031 | Thin film transistor array panel for a liquid crystal display | Jun 24, 1996 | Issued |
Array
(
[id] => 3874530
[patent_doc_number] => 05838047
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'CMOS substrate biasing for threshold voltage control'
[patent_app_type] => 1
[patent_app_number] => 8/663955
[patent_app_country] => US
[patent_app_date] => 1996-06-14
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/838/05838047.pdf
[firstpage_image] =>[orig_patent_app_number] => 663955
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/663955 | CMOS substrate biasing for threshold voltage control | Jun 13, 1996 | Issued |