John Kwon

Array ( [id] => 3080531 [patent_doc_number] => 05323060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Multichip module having a stacked chip arrangement' [patent_app_type] => 1 [patent_app_number] => 8/071580 [patent_app_country] => US [patent_app_date] => 1993-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1784 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/323/05323060.pdf [firstpage_image] =>[orig_patent_app_number] => 071580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3463755 [patent_doc_number] => 05442221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Hall effect sensor' [patent_app_type] => 1 [patent_app_number] => 8/065003 [patent_app_country] => US [patent_app_date] => 1993-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4317 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442221.pdf [firstpage_image] =>[orig_patent_app_number] => 065003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3953651 [patent_doc_number] => 05977585 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Deposited tunneling oxide' [patent_app_type] => 1 [patent_app_number] => 8/064203 [patent_app_country] => US [patent_app_date] => 1993-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2214 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977585.pdf [firstpage_image] =>[orig_patent_app_number] => 064203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3124456 [patent_doc_number] => 05381047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Semiconductor integrated circuit having multiple silicon chips' [patent_app_type] => 1 [patent_app_number] => 8/063911 [patent_app_country] => US [patent_app_date] => 1993-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1602 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/381/05381047.pdf [firstpage_image] =>[orig_patent_app_number] => 063911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3061884 [patent_doc_number] => 05338967 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-16 [patent_title] => 'Semiconductor device structure with plated heat sink and supporting substrate' [patent_app_type] => 1 [patent_app_number] => 8/057790 [patent_app_country] => US [patent_app_date] => 1993-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 52 [patent_no_of_words] => 6028 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/338/05338967.pdf [firstpage_image] =>[orig_patent_app_number] => 057790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4013256 [patent_doc_number] => 05889298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Vertical JFET field effect transistor' [patent_app_type] => 1 [patent_app_number] => 8/056681 [patent_app_country] => US [patent_app_date] => 1993-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 5566 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889298.pdf [firstpage_image] =>[orig_patent_app_number] => 056681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3006880 [patent_doc_number] => 05371407 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'Electronic circuit with diamond substrate and conductive vias' [patent_app_type] => 1 [patent_app_number] => 8/055265 [patent_app_country] => US [patent_app_date] => 1993-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2808 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371407.pdf [firstpage_image] =>[orig_patent_app_number] => 055265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3041065 [patent_doc_number] => 05373183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-13 [patent_title] => 'Integrated circuit with improved reverse bias breakdown' [patent_app_type] => 1 [patent_app_number] => 8/053244 [patent_app_country] => US [patent_app_date] => 1993-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3413 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/373/05373183.pdf [firstpage_image] =>[orig_patent_app_number] => 053244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3485486 [patent_doc_number] => 05406115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-11 [patent_title] => 'Semiconductor device including bipolar transistor having shallowed base and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/052919 [patent_app_country] => US [patent_app_date] => 1993-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3376 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/406/05406115.pdf [firstpage_image] =>[orig_patent_app_number] => 052919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3009275 [patent_doc_number] => 05374831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Quantum well phonon modulator' [patent_app_type] => 1 [patent_app_number] => 8/051105 [patent_app_country] => US [patent_app_date] => 1993-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1584 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/374/05374831.pdf [firstpage_image] =>[orig_patent_app_number] => 051105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3054762 [patent_doc_number] => 05324974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-28 [patent_title] => 'Nitride capped MOSFET for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/046781 [patent_app_country] => US [patent_app_date] => 1993-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4023 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/324/05324974.pdf [firstpage_image] =>[orig_patent_app_number] => 046781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3433157 [patent_doc_number] => 05463255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Semiconductor integrated circuit device having an electrode pad including an extended wire bonding portion' [patent_app_type] => 1 [patent_app_number] => 8/035638 [patent_app_country] => US [patent_app_date] => 1993-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1740 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463255.pdf [firstpage_image] =>[orig_patent_app_number] => 035638 [rel_patent_id] =>[rel_patent_doc_number] =>)