Search

John L. Leguyader

Director (ID: 9832, Phone: (571)272-4650 , Office: P/2600 )

Most Active Art Unit
1805
Art Unit(s)
1635, 1804, 1805, 2899, 1633, 1809, 1621
Total Applications
501
Issued Applications
292
Pending Applications
54
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19726908 [patent_doc_number] => 20250029659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => THREE-DIMENSIONAL NOR MEMORY DEVICE FOR MULTIPLY-ACCUMULATE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/741633 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741633
THREE-DIMENSIONAL NOR MEMORY DEVICE FOR MULTIPLY-ACCUMULATE OPERATIONS Jun 11, 2024 Pending
Array ( [id] => 20324366 [patent_doc_number] => 20250336454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => STATE DEPENDENT VERIFY VOLTAGE RAMPING TIME PERIODS FOR A PROGRAM-VERIFY OPERATION FOR PERFORMANCE GAIN [patent_app_type] => utility [patent_app_number] => 18/740793 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/740793
STATE DEPENDENT VERIFY VOLTAGE RAMPING TIME PERIODS FOR A PROGRAM-VERIFY OPERATION FOR PERFORMANCE GAIN Jun 11, 2024 Pending
Array ( [id] => 19466498 [patent_doc_number] => 20240320168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STORAGE MEDIUM, STORAGE ELEMENT, STORAGE MEDIUM CONFIGURATION METHOD, AND DATA TRANSMISSION METHOD [patent_app_type] => utility [patent_app_number] => 18/735729 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735729 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735729
STORAGE MEDIUM, STORAGE ELEMENT, STORAGE MEDIUM CONFIGURATION METHOD, AND DATA TRANSMISSION METHOD Jun 5, 2024 Pending
Array ( [id] => 20396663 [patent_doc_number] => 20250372138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => READ/WRITE CIRCUITS FOR MULTI-STORY CROSS-POINT MEMORY [patent_app_type] => utility [patent_app_number] => 18/679474 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679474 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679474
READ/WRITE CIRCUITS FOR MULTI-STORY CROSS-POINT MEMORY May 30, 2024 Pending
Array ( [id] => 20305203 [patent_doc_number] => 12451199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Semiconductor memory device performing program operation and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/679914 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7392 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679914
Semiconductor memory device performing program operation and method of operating the same May 30, 2024 Issued
Array ( [id] => 20396700 [patent_doc_number] => 20250372175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SUSPEND-RESUME-GO TECHNIQUES FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/677632 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677632 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677632
SUSPEND-RESUME-GO TECHNIQUES FOR MEMORY DEVICES May 28, 2024 Pending
Array ( [id] => 20396678 [patent_doc_number] => 20250372153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => ONE-SIDED TRANSMITTER EQUALIZATION [patent_app_type] => utility [patent_app_number] => 18/677014 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677014 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677014
ONE-SIDED TRANSMITTER EQUALIZATION May 28, 2024 Pending
Array ( [id] => 20196559 [patent_doc_number] => 20250273269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => PROGRAMMING METHODS FOR MEMORY DEVICES, MEMORY DEVICES AND MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/671476 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671476
PROGRAMMING METHODS FOR MEMORY DEVICES, MEMORY DEVICES AND MEMORY SYSTEMS May 21, 2024 Pending
Array ( [id] => 19452389 [patent_doc_number] => 20240312519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE TO HOLD 5-BITS OF DATA PER MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/666886 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666886 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666886
SEMICONDUCTOR MEMORY DEVICE TO HOLD 5-BITS OF DATA PER MEMORY CELL May 16, 2024 Pending
Array ( [id] => 20063092 [patent_doc_number] => 20250201314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => MEMORY DEVICE AND OPERATION METHOD FOR IMPROVING A READ OPERATION [patent_app_type] => utility [patent_app_number] => 18/663104 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663104 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663104
MEMORY DEVICE AND OPERATION METHOD FOR IMPROVING A READ OPERATION May 13, 2024 Pending
Array ( [id] => 19589398 [patent_doc_number] => 20240386955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MEMORY DEVICE OF THE PHASE-CHANGE TYPE AND METHOD FOR READING SUCH A DEVICE [patent_app_type] => utility [patent_app_number] => 18/660938 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660938
MEMORY DEVICE OF THE PHASE-CHANGE TYPE AND METHOD FOR READING SUCH A DEVICE May 9, 2024 Pending
Array ( [id] => 20167638 [patent_doc_number] => 20250259685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => HIGH BANDWIDTH NONVOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/660476 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660476
HIGH BANDWIDTH NONVOLATILE MEMORY DEVICES May 9, 2024 Pending
Array ( [id] => 19406886 [patent_doc_number] => 20240290397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => APPARATUS FOR CONTROLLING NAND FLASH MEMORY DEVICE AND METHOD FOR CONTROLLING SAME [patent_app_type] => utility [patent_app_number] => 18/656344 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656344
APPARATUS FOR CONTROLLING NAND FLASH MEMORY DEVICE AND METHOD FOR CONTROLLING SAME May 5, 2024 Pending
Array ( [id] => 19531461 [patent_doc_number] => 20240355363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => BIT LINE CONTACT SCHEME IN A MEMORY SYSTEM STACK [patent_app_type] => utility [patent_app_number] => 18/630919 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630919
BIT LINE CONTACT SCHEME IN A MEMORY SYSTEM STACK Apr 8, 2024 Pending
Array ( [id] => 20331859 [patent_doc_number] => 12462137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Memory card with multiple modes, and host device corresponding to the memory card [patent_app_type] => utility [patent_app_number] => 18/624312 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 37 [patent_no_of_words] => 11512 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624312 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624312
Memory card with multiple modes, and host device corresponding to the memory card Apr 1, 2024 Issued
Array ( [id] => 19305240 [patent_doc_number] => 20240233820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => RRAM CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/615521 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615521 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615521
RRAM circuit Mar 24, 2024 Issued
Array ( [id] => 20019326 [patent_doc_number] => 20250157548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/610368 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610368 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610368
MEMORY DEVICE AND OPERATION METHOD THEREOF Mar 19, 2024 Pending
Array ( [id] => 19467689 [patent_doc_number] => 20240321359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/593980 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593980
Semiconductor memory device Mar 3, 2024 Issued
Array ( [id] => 19926013 [patent_doc_number] => 12300305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Parallel access in a memory array [patent_app_type] => utility [patent_app_number] => 18/582185 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582185 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582185
Parallel access in a memory array Feb 19, 2024 Issued
Array ( [id] => 19146000 [patent_doc_number] => 20240145016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/400297 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/400297
Non-volatile memory device and method for programming a non-volatile memory device Dec 28, 2023 Issued
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