Search

John L. Leguyader

Director (ID: 16292, Phone: (571)272-4650 , Office: P/2600 )

Most Active Art Unit
1805
Art Unit(s)
1804, 1633, 1621, 1805, 1809, 1635, 2899
Total Applications
501
Issued Applications
292
Pending Applications
54
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6444568 [patent_doc_number] => 20020177076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Exposure method' [patent_app_type] => new [patent_app_number] => 10/195394 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7084 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20020177076.pdf [firstpage_image] =>[orig_patent_app_number] => 10195394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195394
Exposure method Jul 15, 2002 Issued
Array ( [id] => 6787496 [patent_doc_number] => 20030138735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Method for forming a resist pattern and method for manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/191491 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5123 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20030138735.pdf [firstpage_image] =>[orig_patent_app_number] => 10191491 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191491
Method for forming a resist pattern and method for manufacturing a semiconductor device Jul 9, 2002 Issued
Array ( [id] => 7442916 [patent_doc_number] => 20040009437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Method of 193 NM photoresist stabilization by the use of ion implantation' [patent_app_type] => new [patent_app_number] => 10/191546 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3970 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20040009437.pdf [firstpage_image] =>[orig_patent_app_number] => 10191546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191546
Method of 193 NM photoresist stabilization by the use of ion implantation Jul 9, 2002 Issued
Array ( [id] => 777108 [patent_doc_number] => 06998226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Method of forming patterned photoresist layer' [patent_app_type] => utility [patent_app_number] => 10/193464 [patent_app_country] => US [patent_app_date] => 2002-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1070 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998226.pdf [firstpage_image] =>[orig_patent_app_number] => 10193464 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/193464
Method of forming patterned photoresist layer Jul 9, 2002 Issued
Array ( [id] => 6715731 [patent_doc_number] => 20030027079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Method of producing conductive or semiconducting structured polymers' [patent_app_type] => new [patent_app_number] => 10/191995 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3281 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20030027079.pdf [firstpage_image] =>[orig_patent_app_number] => 10191995 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191995
Method of producing conductive or semiconducting structured polymers Jul 8, 2002 Issued
Array ( [id] => 1110486 [patent_doc_number] => 06806008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Method for adjusting a temperature in a resist process' [patent_app_type] => B2 [patent_app_number] => 10/190097 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3228 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806008.pdf [firstpage_image] =>[orig_patent_app_number] => 10190097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190097
Method for adjusting a temperature in a resist process Jul 2, 2002 Issued
Array ( [id] => 1208873 [patent_doc_number] => 06713236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-30 [patent_title] => 'Lithography method for preventing lithographic exposure of peripheral region of semiconductor wafer' [patent_app_type] => B2 [patent_app_number] => 10/188532 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/713/06713236.pdf [firstpage_image] =>[orig_patent_app_number] => 10188532 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188532
Lithography method for preventing lithographic exposure of peripheral region of semiconductor wafer Jul 2, 2002 Issued
Array ( [id] => 960995 [patent_doc_number] => 06951707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-04 [patent_title] => 'Process for creating vias for circuit assemblies' [patent_app_type] => utility [patent_app_number] => 10/184387 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7918 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/951/06951707.pdf [firstpage_image] =>[orig_patent_app_number] => 10184387 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184387
Process for creating vias for circuit assemblies Jun 26, 2002 Issued
Array ( [id] => 1092423 [patent_doc_number] => 06824959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Process for creating holes in polymeric substrates' [patent_app_type] => B2 [patent_app_number] => 10/183674 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6106 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/824/06824959.pdf [firstpage_image] =>[orig_patent_app_number] => 10183674 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183674
Process for creating holes in polymeric substrates Jun 26, 2002 Issued
Array ( [id] => 6325700 [patent_doc_number] => 20020197567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Method of manufacturing a semiconductor device and designing a mask pattern' [patent_app_type] => new [patent_app_number] => 10/173037 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20020197567.pdf [firstpage_image] =>[orig_patent_app_number] => 10173037 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173037
Method of manufacturing a semiconductor device and designing a mask pattern Jun 17, 2002 Issued
Array ( [id] => 1110553 [patent_doc_number] => 06806037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Method for producing and/or renewing an etching mask' [patent_app_type] => B2 [patent_app_number] => 10/167785 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2780 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806037.pdf [firstpage_image] =>[orig_patent_app_number] => 10167785 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167785
Method for producing and/or renewing an etching mask Jun 11, 2002 Issued
Array ( [id] => 963517 [patent_doc_number] => 06949329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Pattern formation method' [patent_app_type] => utility [patent_app_number] => 10/166247 [patent_app_country] => US [patent_app_date] => 2002-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 15735 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949329.pdf [firstpage_image] =>[orig_patent_app_number] => 10166247 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/166247
Pattern formation method Jun 10, 2002 Issued
Array ( [id] => 408061 [patent_doc_number] => 07285378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'Juxtaposed island manufacturing method by means of self-organised deposition on a substrate and structure obtained using said method' [patent_app_type] => utility [patent_app_number] => 10/163035 [patent_app_country] => US [patent_app_date] => 2002-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3078 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/285/07285378.pdf [firstpage_image] =>[orig_patent_app_number] => 10163035 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163035
Juxtaposed island manufacturing method by means of self-organised deposition on a substrate and structure obtained using said method Jun 3, 2002 Issued
Array ( [id] => 1137396 [patent_doc_number] => 06780572 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-24 [patent_title] => 'Optical lithography' [patent_app_type] => B1 [patent_app_number] => 10/049105 [patent_app_country] => US [patent_app_date] => 2002-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5658 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/780/06780572.pdf [firstpage_image] =>[orig_patent_app_number] => 10049105 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/049105
Optical lithography May 30, 2002 Issued
Array ( [id] => 723844 [patent_doc_number] => 07045277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride' [patent_app_type] => utility [patent_app_number] => 10/160698 [patent_app_country] => US [patent_app_date] => 2002-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3955 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/045/07045277.pdf [firstpage_image] =>[orig_patent_app_number] => 10160698 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/160698
Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride May 29, 2002 Issued
Array ( [id] => 6110862 [patent_doc_number] => 20020172892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Metallizing method for dielectrics' [patent_app_type] => new [patent_app_number] => 10/156484 [patent_app_country] => US [patent_app_date] => 2002-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3743 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20020172892.pdf [firstpage_image] =>[orig_patent_app_number] => 10156484 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/156484
Metallizing method for dielectrics May 27, 2002 Issued
Array ( [id] => 6715738 [patent_doc_number] => 20030027086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Thick film photoresists and methods for use thereof' [patent_app_type] => new [patent_app_number] => 10/142732 [patent_app_country] => US [patent_app_date] => 2002-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7324 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 34 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20030027086.pdf [firstpage_image] =>[orig_patent_app_number] => 10142732 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/142732
Thick film photoresists and methods for use thereof May 9, 2002 Issued
Array ( [id] => 960997 [patent_doc_number] => 06951709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-04 [patent_title] => 'Method of fabricating a semiconductor multilevel interconnect structure' [patent_app_type] => utility [patent_app_number] => 10/137384 [patent_app_country] => US [patent_app_date] => 2002-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5206 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/951/06951709.pdf [firstpage_image] =>[orig_patent_app_number] => 10137384 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/137384
Method of fabricating a semiconductor multilevel interconnect structure May 2, 2002 Issued
Array ( [id] => 732044 [patent_doc_number] => 07037639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Methods of manufacturing a lithography template' [patent_app_type] => utility [patent_app_number] => 10/136188 [patent_app_country] => US [patent_app_date] => 2002-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 6913 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037639.pdf [firstpage_image] =>[orig_patent_app_number] => 10136188 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136188
Methods of manufacturing a lithography template Apr 30, 2002 Issued
Array ( [id] => 6662217 [patent_doc_number] => 20030201543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Deep UV-resistant photoresist plug for via hole' [patent_app_type] => new [patent_app_number] => 10/133613 [patent_app_country] => US [patent_app_date] => 2002-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2697 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201543.pdf [firstpage_image] =>[orig_patent_app_number] => 10133613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/133613
Deep UV-resistant photoresist plug for via hole Apr 25, 2002 Issued
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