Search

John L. Leguyader

Director (ID: 9832, Phone: (571)272-4650 , Office: P/2600 )

Most Active Art Unit
1805
Art Unit(s)
1635, 1804, 1805, 2899, 1633, 1809, 1621
Total Applications
501
Issued Applications
292
Pending Applications
54
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20345820 [patent_doc_number] => 12469555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Unselect word line switch bias scheme for non-volatile memory apparatus [patent_app_type] => utility [patent_app_number] => 18/228088 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 8162 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228088
Unselect word line switch bias scheme for non-volatile memory apparatus Jul 30, 2023 Issued
Array ( [id] => 19740959 [patent_doc_number] => 12217798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Bank design with differential bulk bias in eFuse array [patent_app_type] => utility [patent_app_number] => 18/362198 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362198
Bank design with differential bulk bias in eFuse array Jul 30, 2023 Issued
Array ( [id] => 18743106 [patent_doc_number] => 20230352094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => MEMORY DEVICE AND PROGRAM OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/220681 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220681 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/220681
Memory device having cache storage unit for storage of current and next data pages and program operation thereof Jul 10, 2023 Issued
Array ( [id] => 19670633 [patent_doc_number] => 12183400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Three dimensional stacked nonvolatile semiconductor memory having a controller configured to execute a program operation on memory cells [patent_app_type] => utility [patent_app_number] => 18/340977 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 9806 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340977 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340977
Three dimensional stacked nonvolatile semiconductor memory having a controller configured to execute a program operation on memory cells Jun 25, 2023 Issued
Array ( [id] => 18711352 [patent_doc_number] => 20230333981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MEMORY CIRCUIT AND CACHE CIRCUIT CONFIGURATION [patent_app_type] => utility [patent_app_number] => 18/341088 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341088
Memory circuit and cache circuit configuration Jun 25, 2023 Issued
Array ( [id] => 19660424 [patent_doc_number] => 20240427489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/338153 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338153
Semiconductor device Jun 19, 2023 Issued
Array ( [id] => 20455777 [patent_doc_number] => 12518837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Memory device including precharge voltage control and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 18/323306 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7908 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323306 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323306
Memory device including precharge voltage control and method of operating the memory device May 23, 2023 Issued
Array ( [id] => 18615547 [patent_doc_number] => 20230282284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/315703 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/315703
Semiconductor devices May 10, 2023 Issued
Array ( [id] => 19414526 [patent_doc_number] => 12080360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Reducing programming disturbance in memory devices [patent_app_type] => utility [patent_app_number] => 18/195181 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195181 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195181
Reducing programming disturbance in memory devices May 8, 2023 Issued
Array ( [id] => 18599983 [patent_doc_number] => 20230274784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHOD OF CONTROLLING A SEMICONDUCTOR MEMORY INCLUDING MEMORY CELLS AND A WORD LINE [patent_app_type] => utility [patent_app_number] => 18/312696 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312696 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312696
Memory system including semiconductor memory and controller capable of determining necessary shifted boundary read voltages in a short period of time May 4, 2023 Issued
Array ( [id] => 19168258 [patent_doc_number] => 11984169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Piecewise linear and trimmable temperature sensor [patent_app_type] => utility [patent_app_number] => 18/142423 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 8424 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142423 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142423
Piecewise linear and trimmable temperature sensor May 1, 2023 Issued
Array ( [id] => 20507902 [patent_doc_number] => 12542184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Memory device including initial charging phase for double sense operation [patent_app_type] => utility [patent_app_number] => 18/141136 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10044 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141136 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141136
Memory device including initial charging phase for double sense operation Apr 27, 2023 Issued
Array ( [id] => 20416657 [patent_doc_number] => 12499947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Memory device for performing foggy-fine program operation and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 18/300958 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 7062 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/300958
Memory device for performing foggy-fine program operation and method of operating the memory device Apr 13, 2023 Issued
Array ( [id] => 18712533 [patent_doc_number] => 20230335166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MEMORY DEVICES HAVING SPECIAL MODE ACCESS [patent_app_type] => utility [patent_app_number] => 18/134318 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134318
MEMORY DEVICES HAVING SPECIAL MODE ACCESS Apr 12, 2023 Pending
Array ( [id] => 20484191 [patent_doc_number] => 12532672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Semiconductor device including shield layer [patent_app_type] => utility [patent_app_number] => 18/193336 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 8407 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193336 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193336
Semiconductor device including shield layer Mar 29, 2023 Issued
Array ( [id] => 20189573 [patent_doc_number] => 12400695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Semiconductor memory with adjustment circuit and method for controlling a semiconductor memory [patent_app_type] => utility [patent_app_number] => 18/192294 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 1307 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192294 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192294
Semiconductor memory with adjustment circuit and method for controlling a semiconductor memory Mar 28, 2023 Issued
Array ( [id] => 18661033 [patent_doc_number] => 20230307046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => QUANTUM INFORMATION STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/188684 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188684
Quantum information storage device Mar 22, 2023 Issued
Array ( [id] => 19467700 [patent_doc_number] => 20240321370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SECURE ANTI-FUSE ONE TIME PROGRAMMABLE BIT CELL DESIGN [patent_app_type] => utility [patent_app_number] => 18/187993 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187993 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/187993
SECURE ANTI-FUSE ONE TIME PROGRAMMABLE BIT CELL DESIGN Mar 21, 2023 Pending
Array ( [id] => 19918409 [patent_doc_number] => 12293782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Convertible memory device [patent_app_type] => utility [patent_app_number] => 18/186960 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 8304 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186960
Convertible memory device Mar 20, 2023 Issued
Array ( [id] => 20229160 [patent_doc_number] => 12417814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Storage device for backing up state group data in the event of a sudden power-off and program method thereof [patent_app_type] => utility [patent_app_number] => 18/186480 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4801 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186480
Storage device for backing up state group data in the event of a sudden power-off and program method thereof Mar 19, 2023 Issued
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