Search

John L. Leguyader

Director (ID: 16292, Phone: (571)272-4650 , Office: P/2600 )

Most Active Art Unit
1805
Art Unit(s)
1804, 1633, 1621, 1805, 1809, 1635, 2899
Total Applications
501
Issued Applications
292
Pending Applications
54
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3923413 [patent_doc_number] => 05952160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Method and system for controlling the relative size of images formed in light-sensitive media' [patent_app_type] => 1 [patent_app_number] => 8/752113 [patent_app_country] => US [patent_app_date] => 1996-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 5746 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952160.pdf [firstpage_image] =>[orig_patent_app_number] => 752113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/752113
Method and system for controlling the relative size of images formed in light-sensitive media Nov 19, 1996 Issued
Array ( [id] => 4064645 [patent_doc_number] => 05895740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers' [patent_app_type] => 1 [patent_app_number] => 8/747273 [patent_app_country] => US [patent_app_date] => 1996-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895740.pdf [firstpage_image] =>[orig_patent_app_number] => 747273 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/747273
Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers Nov 12, 1996 Issued
Array ( [id] => 1369528 [patent_doc_number] => 06562544 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method and apparatus for improving accuracy in photolithographic processing of substrates' [patent_app_type] => B1 [patent_app_number] => 08/743628 [patent_app_country] => US [patent_app_date] => 1996-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10606 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562544.pdf [firstpage_image] =>[orig_patent_app_number] => 08743628 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/743628
Method and apparatus for improving accuracy in photolithographic processing of substrates Nov 3, 1996 Issued
Array ( [id] => 3976765 [patent_doc_number] => 05948598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Anti-reflective silicon nitride film using in-situ deposition' [patent_app_type] => 1 [patent_app_number] => 8/742228 [patent_app_country] => US [patent_app_date] => 1996-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1996 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/948/05948598.pdf [firstpage_image] =>[orig_patent_app_number] => 742228 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/742228
Anti-reflective silicon nitride film using in-situ deposition Oct 30, 1996 Issued
08/736966 EXPOSURE APPARATUS AND METHOD Oct 24, 1996 Abandoned
Array ( [id] => 3695404 [patent_doc_number] => 05677109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Method for E-beam writing' [patent_app_type] => 1 [patent_app_number] => 8/736294 [patent_app_country] => US [patent_app_date] => 1996-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2106 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677109.pdf [firstpage_image] =>[orig_patent_app_number] => 736294 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/736294
Method for E-beam writing Oct 23, 1996 Issued
Array ( [id] => 3625315 [patent_doc_number] => 05686223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Method for reduced pitch lithography' [patent_app_type] => 1 [patent_app_number] => 8/740014 [patent_app_country] => US [patent_app_date] => 1996-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/686/05686223.pdf [firstpage_image] =>[orig_patent_app_number] => 740014 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/740014
Method for reduced pitch lithography Oct 22, 1996 Issued
Array ( [id] => 3963099 [patent_doc_number] => 05885754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Method of forming a pattern' [patent_app_type] => 1 [patent_app_number] => 8/736174 [patent_app_country] => US [patent_app_date] => 1996-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 65 [patent_no_of_words] => 18719 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/885/05885754.pdf [firstpage_image] =>[orig_patent_app_number] => 736174 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/736174
Method of forming a pattern Oct 22, 1996 Issued
08/734826 SUB-MICRON PATTERNING USING OPTICAL LITHOGRAPHY Oct 21, 1996 Abandoned
Array ( [id] => 3790288 [patent_doc_number] => 05725996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Energy sensitive composition and a process for device fabrication using this composition' [patent_app_type] => 1 [patent_app_number] => 8/731865 [patent_app_country] => US [patent_app_date] => 1996-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5004 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/725/05725996.pdf [firstpage_image] =>[orig_patent_app_number] => 731865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/731865
Energy sensitive composition and a process for device fabrication using this composition Oct 21, 1996 Issued
Array ( [id] => 3726886 [patent_doc_number] => 05652084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Method for reduced pitch lithography' [patent_app_type] => 1 [patent_app_number] => 8/740145 [patent_app_country] => US [patent_app_date] => 1996-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6905 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652084.pdf [firstpage_image] =>[orig_patent_app_number] => 740145 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/740145
Method for reduced pitch lithography Oct 21, 1996 Issued
Array ( [id] => 4040116 [patent_doc_number] => 05874200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Method for forming a pattern preventing water mark formation' [patent_app_type] => 1 [patent_app_number] => 8/732592 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3302 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874200.pdf [firstpage_image] =>[orig_patent_app_number] => 732592 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732592
Method for forming a pattern preventing water mark formation Oct 14, 1996 Issued
Array ( [id] => 3772359 [patent_doc_number] => 05817446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Method of forming airbridged metallization for integrated circuit fabrication' [patent_app_type] => 1 [patent_app_number] => 8/732565 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2529 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/817/05817446.pdf [firstpage_image] =>[orig_patent_app_number] => 732565 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732565
Method of forming airbridged metallization for integrated circuit fabrication Oct 14, 1996 Issued
Array ( [id] => 3658899 [patent_doc_number] => 05648200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Process for creating circuitry on the surface of a photoimageable dielectric' [patent_app_type] => 1 [patent_app_number] => 8/726546 [patent_app_country] => US [patent_app_date] => 1996-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2754 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/648/05648200.pdf [firstpage_image] =>[orig_patent_app_number] => 726546 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726546
Process for creating circuitry on the surface of a photoimageable dielectric Oct 6, 1996 Issued
Array ( [id] => 3806291 [patent_doc_number] => 05811223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Method for inspecting process defects occurring in semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/725177 [patent_app_country] => US [patent_app_date] => 1996-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2928 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/811/05811223.pdf [firstpage_image] =>[orig_patent_app_number] => 725177 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/725177
Method for inspecting process defects occurring in semiconductor devices Oct 2, 1996 Issued
Array ( [id] => 3772346 [patent_doc_number] => 05817445 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Method for inspecting process defects occurring in semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/725176 [patent_app_country] => US [patent_app_date] => 1996-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2926 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/817/05817445.pdf [firstpage_image] =>[orig_patent_app_number] => 725176 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/725176
Method for inspecting process defects occurring in semiconductor devices Oct 2, 1996 Issued
Array ( [id] => 3871241 [patent_doc_number] => 05824457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Use of WEE (wafer edge exposure) to prevent polyimide contamination' [patent_app_type] => 1 [patent_app_number] => 8/720639 [patent_app_country] => US [patent_app_date] => 1996-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2304 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/824/05824457.pdf [firstpage_image] =>[orig_patent_app_number] => 720639 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720639
Use of WEE (wafer edge exposure) to prevent polyimide contamination Oct 1, 1996 Issued
Array ( [id] => 3780229 [patent_doc_number] => 05821034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Method for forming micro patterns of semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/720020 [patent_app_country] => US [patent_app_date] => 1996-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 1862 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821034.pdf [firstpage_image] =>[orig_patent_app_number] => 720020 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720020
Method for forming micro patterns of semiconductor devices Sep 26, 1996 Issued
Array ( [id] => 4010304 [patent_doc_number] => 05879862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method for planarizing a non planar layer' [patent_app_type] => 1 [patent_app_number] => 8/719810 [patent_app_country] => US [patent_app_date] => 1996-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1406 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/879/05879862.pdf [firstpage_image] =>[orig_patent_app_number] => 719810 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719810
Method for planarizing a non planar layer Sep 24, 1996 Issued
Array ( [id] => 3886250 [patent_doc_number] => 05834161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Method for fabricating word lines of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/715631 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3225 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/834/05834161.pdf [firstpage_image] =>[orig_patent_app_number] => 715631 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715631
Method for fabricating word lines of a semiconductor device Sep 17, 1996 Issued
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