Search

John Lin

Examiner (ID: 19078, Phone: (571)270-1274 , Office: P/2815 )

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
516
Issued Applications
290
Pending Applications
56
Abandoned Applications
189

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18458811 [patent_doc_number] => 20230200093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => INTEGRATED SRAM MEMORY TAG CIRCUITRY AND DRAM MEMORY CELL ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 17/558405 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558405 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558405
INTEGRATED SRAM MEMORY TAG CIRCUITRY AND DRAM MEMORY CELL ARCHITECTURES Dec 20, 2021 Pending
Array ( [id] => 17536896 [patent_doc_number] => 20220115505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => COPPER-FILLED TRENCH CONTACT FOR TRANSISTOR PERFORMANCE IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 17/558425 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558425
COPPER-FILLED TRENCH CONTACT FOR TRANSISTOR PERFORMANCE IMPROVEMENT Dec 20, 2021 Pending
Array ( [id] => 19859679 [patent_doc_number] => 12262556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Power amplifier [patent_app_type] => utility [patent_app_number] => 17/549566 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7222 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549566 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549566
Power amplifier Dec 12, 2021 Issued
Array ( [id] => 20509011 [patent_doc_number] => 12543303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/536872 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 36 [patent_no_of_words] => 6976 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536872
Semiconductor memory device Nov 28, 2021 Issued
Array ( [id] => 17566691 [patent_doc_number] => 20220130840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/456081 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456081 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456081
SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE MANUFACTURING METHOD Nov 21, 2021 Abandoned
Array ( [id] => 19421078 [patent_doc_number] => 20240297202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => IMAGING ELEMENT, IMAGING DEVICE, AND METHOD OF MANUFACTURING IMAGING ELEMENT [patent_app_type] => utility [patent_app_number] => 18/251630 [patent_app_country] => US [patent_app_date] => 2021-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18251630 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/251630
IMAGING ELEMENT, IMAGING DEVICE, AND METHOD OF MANUFACTURING IMAGING ELEMENT Nov 3, 2021 Pending
Array ( [id] => 18906146 [patent_doc_number] => 20240021631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/255429 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255429 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/255429
SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE Oct 24, 2021 Pending
Array ( [id] => 18339454 [patent_doc_number] => 20230131403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => INTEGRATED CIRCUIT STRUCTURE WITH SPACER SIZED FOR GATE CONTACT AND METHODS TO FORM SAME [patent_app_type] => utility [patent_app_number] => 17/452175 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452175 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/452175
INTEGRATED CIRCUIT STRUCTURE WITH SPACER SIZED FOR GATE CONTACT AND METHODS TO FORM SAME Oct 24, 2021 Abandoned
Array ( [id] => 17389565 [patent_doc_number] => 20220037417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/502349 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502349
Display apparatus Oct 14, 2021 Issued
Array ( [id] => 19830048 [patent_doc_number] => 12250855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/488376 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 54 [patent_no_of_words] => 25428 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488376 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488376
Semiconductor device Sep 28, 2021 Issued
Array ( [id] => 17810896 [patent_doc_number] => 20220262731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/487460 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/487460
SEMICONDUCTOR DEVICES Sep 27, 2021 Pending
Array ( [id] => 18280784 [patent_doc_number] => 20230096256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE HAVING THE STRUCTURE OF WORD-LINES TO AVOID SHORT CIRCUIT AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/486611 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486611 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/486611
Semiconductor memory device having the structure of word-lines to avoid short circuit and method of manufacturing the same Sep 26, 2021 Issued
Array ( [id] => 17870988 [patent_doc_number] => 20220293725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/470168 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470168
SEMICONDUCTOR DEVICE Sep 8, 2021 Abandoned
Array ( [id] => 17738142 [patent_doc_number] => 20220223604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING COMPOSITE MOLD LAYER [patent_app_type] => utility [patent_app_number] => 17/469349 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469349
SEMICONDUCTOR STRUCTURE HAVING COMPOSITE MOLD LAYER Sep 7, 2021 Abandoned
Array ( [id] => 17886783 [patent_doc_number] => 20220302261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR [patent_app_type] => utility [patent_app_number] => 17/447006 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447006 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447006
SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR Sep 6, 2021 Abandoned
Array ( [id] => 17303046 [patent_doc_number] => 20210398885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => SEMICONDUCTOR MODULE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/466266 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/466266
Semiconductor module and semiconductor device Sep 2, 2021 Issued
Array ( [id] => 17278169 [patent_doc_number] => 20210384367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT, METHOD OF FABRICATING THE PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT, AND USE OF THE PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 17/408430 [patent_app_country] => US [patent_app_date] => 2021-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408430 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/408430
PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT, METHOD OF FABRICATING THE PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT, AND USE OF THE PHOTOCONDUCTING LAYERED MATERIAL ARRANGEMENT Aug 21, 2021 Abandoned
Array ( [id] => 18182379 [patent_doc_number] => 20230043108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => VERTICAL TRANSISTOR FUSE LATCHES [patent_app_type] => utility [patent_app_number] => 17/396341 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/396341
Vertical transistor fuse latches Aug 5, 2021 Issued
Array ( [id] => 19208023 [patent_doc_number] => 20240179922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => TRANSISTOR AND METHOD FOR MANUFACTURING SAME, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/782868 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17782868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/782868
Transistor and method for manufacturing same, semiconductor device and method for manufacturing same Aug 5, 2021 Issued
Array ( [id] => 17247099 [patent_doc_number] => 20210366844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => VIA RAIL SOLUTION FOR HIGH POWER ELECTROMIGRATION [patent_app_type] => utility [patent_app_number] => 17/393619 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393619 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393619
VIA RAIL SOLUTION FOR HIGH POWER ELECTROMIGRATION Aug 3, 2021 Pending
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