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John M. Parker

Examiner (ID: 17448)

Most Active Art Unit
2816
Art Unit(s)
2899, 2823, 2816
Total Applications
1196
Issued Applications
1026
Pending Applications
93
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20004010 [patent_doc_number] => 20250142232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => STACKED CMOS IMAGE SENSOR COMPRISING A PIXEL SENSOR FOR HIGH CONVERSION GAIN AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/406526 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406526 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406526
STACKED CMOS IMAGE SENSOR COMPRISING A PIXEL SENSOR FOR HIGH CONVERSION GAIN AND METHOD FOR FORMING THE SAME Jan 7, 2024 Pending
Array ( [id] => 19308765 [patent_doc_number] => 20240237348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/403115 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403115
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Jan 2, 2024 Pending
Array ( [id] => 19255290 [patent_doc_number] => 20240206287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/527430 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527430 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527430
DISPLAY DEVICE Dec 3, 2023 Pending
Array ( [id] => 19749509 [patent_doc_number] => 20250038074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICES WITH BACKSIDE INTERCONNECT STRUCTURE AND THROUGH VIA STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/526311 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526311
SEMICONDUCTOR DEVICES WITH BACKSIDE INTERCONNECT STRUCTURE AND THROUGH VIA STRUCTURE Nov 30, 2023 Pending
Array ( [id] => 20002527 [patent_doc_number] => 20250140749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/520946 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520946 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520946
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Nov 27, 2023 Pending
Array ( [id] => 19285759 [patent_doc_number] => 20240222236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/518096 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518096
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF Nov 21, 2023 Pending
Array ( [id] => 20013147 [patent_doc_number] => 20250151369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => FERROELECTRIC CAPACITIVE MEMORY DEVICES WITH A MULTIPLE-WORK-FUNCTION ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/501170 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501170
FERROELECTRIC CAPACITIVE MEMORY DEVICES WITH A MULTIPLE-WORK-FUNCTION ELECTRODE Nov 2, 2023 Pending
Array ( [id] => 20002525 [patent_doc_number] => 20250140747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/385499 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/385499
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Oct 30, 2023 Pending
Array ( [id] => 19305573 [patent_doc_number] => 20240234153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => WAFER POLISHING SYSTEM, SIMULATION AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/471534 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471534 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/471534
WAFER POLISHING SYSTEM, SIMULATION AND CONTROL METHOD THEREOF Sep 20, 2023 Pending
Array ( [id] => 19850633 [patent_doc_number] => 20250095984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => IN-SITU SIDEWALL PASSIVATION TOWARD THE BOTTOM OF HIGH ASPECT RATIO FEATURES [patent_app_type] => utility [patent_app_number] => 18/370536 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370536 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370536
IN-SITU SIDEWALL PASSIVATION TOWARD THE BOTTOM OF HIGH ASPECT RATIO FEATURES Sep 19, 2023 Pending
Array ( [id] => 19619341 [patent_doc_number] => 20240405021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => TRANSISTOR ISOLATION STRUCTURES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/468409 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18468409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/468409
TRANSISTOR ISOLATION STRUCTURES AND METHODS OF FORMING THE SAME Sep 14, 2023 Pending
Array ( [id] => 19054963 [patent_doc_number] => 20240096932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR ELEMENTS WITH FIELD SHIELDING BY POLARIZATION DOPING [patent_app_type] => utility [patent_app_number] => 18/467961 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467961
SEMICONDUCTOR ELEMENTS WITH FIELD SHIELDING BY POLARIZATION DOPING Sep 14, 2023 Pending
Array ( [id] => 19071320 [patent_doc_number] => 20240105746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/368372 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368372
IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME Sep 13, 2023 Pending
Array ( [id] => 18679912 [patent_doc_number] => 20230317570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => LEAD FRAME AND METHOD FOR MANUFACTURING LEAD FRAME [patent_app_type] => utility [patent_app_number] => 18/117140 [patent_app_country] => US [patent_app_date] => 2023-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/117140
LEAD FRAME AND METHOD FOR MANUFACTURING LEAD FRAME Mar 2, 2023 Pending
Array ( [id] => 19531724 [patent_doc_number] => 20240355626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => METHOD FOR CONTROLLING RESISTIVITY AND CRYSTALLINITY OF LOW-RESISTANCE MATERIAL THROUGH PVD [patent_app_type] => utility [patent_app_number] => 18/574093 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18574093 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/574093
METHOD FOR CONTROLLING RESISTIVITY AND CRYSTALLINITY OF LOW-RESISTANCE MATERIAL THROUGH PVD Jun 7, 2022 Pending
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