Search

John M. Parker

Examiner (ID: 11130, Phone: (571)272-8794 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2823, 2816
Total Applications
1173
Issued Applications
1023
Pending Applications
77
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17217784 [patent_doc_number] => 20210351122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/105736 [patent_app_country] => US [patent_app_date] => 2020-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105736 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105736
Semiconductor package and method of fabricating the same Nov 26, 2020 Issued
Array ( [id] => 17630655 [patent_doc_number] => 20220165670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => SEMICONDUCTOR DEVICE WITH BURIED METAL PAD, AND METHODS FOR MANUFACTURE [patent_app_type] => utility [patent_app_number] => 17/103633 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103633 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103633
Semiconductor device with buried metal pad, and methods for manufacture Nov 23, 2020 Issued
Array ( [id] => 18548264 [patent_doc_number] => 11721624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Patterning approach for improved via landing profile [patent_app_type] => utility [patent_app_number] => 16/952345 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952345
Patterning approach for improved via landing profile Nov 18, 2020 Issued
Array ( [id] => 17318875 [patent_doc_number] => 20210407925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => HYBRID CONDUCTIVE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/950537 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950537 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950537
Hybrid conductive structures Nov 16, 2020 Issued
Array ( [id] => 17615453 [patent_doc_number] => 20220157733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => TOPOLOGICAL SEMI-METAL INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 16/950453 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950453 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950453
Topological semi-metal interconnects Nov 16, 2020 Issued
Array ( [id] => 18701190 [patent_doc_number] => 11787688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Methods of forming MEMS diaphragms including corrugations [patent_app_type] => utility [patent_app_number] => 17/099442 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 17090 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099442
Methods of forming MEMS diaphragms including corrugations Nov 15, 2020 Issued
Array ( [id] => 17615432 [patent_doc_number] => 20220157712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE WITH CARBON HARD MASK AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/099215 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099215
Semiconductor device with carbon hard mask and method for fabricating the same Nov 15, 2020 Issued
Array ( [id] => 17615430 [patent_doc_number] => 20220157710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => TWO 2D CAPPING LAYERS ON INTERCONNECT CONDUCTIVE STRUCTURE TO INCREASE INTERCONNECT STRUCTURE RELIABILITY [patent_app_type] => utility [patent_app_number] => 17/097406 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097406 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097406
Two 2D capping layers on interconnect conductive structure to increase interconnect structure reliability Nov 12, 2020 Issued
Array ( [id] => 17615431 [patent_doc_number] => 20220157711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => INTERCONNECT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/097505 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097505 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097505
Interconnect structure Nov 12, 2020 Issued
Array ( [id] => 18593333 [patent_doc_number] => 11742244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Leakage reduction methods and structures thereof [patent_app_type] => utility [patent_app_number] => 17/093350 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 12920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093350
Leakage reduction methods and structures thereof Nov 8, 2020 Issued
Array ( [id] => 17599362 [patent_doc_number] => 20220148936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => PACKAGE STRUCTURE AND CIRCUIT LAYER STRUCTURE INCLUDING DUMMY TRACE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/092193 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092193 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092193
Package structure and circuit layer structure including dummy trace and manufacturing method therefor Nov 5, 2020 Issued
Array ( [id] => 17389340 [patent_doc_number] => 20220037192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => Spacers for Semiconductor Devices Including Backside Power Rails [patent_app_type] => utility [patent_app_number] => 17/088002 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088002
Spacers for semiconductor devices including backside power rails Nov 2, 2020 Issued
Array ( [id] => 17359894 [patent_doc_number] => 20220020690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => SEMICONDUCTOR CHIP INCLUDING PENETRATING ELECTRODES, AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 17/088363 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088363
Semiconductor chip including penetrating electrodes, and semiconductor package including the semiconductor chip Nov 2, 2020 Issued
Array ( [id] => 18175379 [patent_doc_number] => 11575100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/082459 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 11333 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082459 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082459
Display device and method of manufacturing the same Oct 27, 2020 Issued
Array ( [id] => 18892803 [patent_doc_number] => 11871596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/082379 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 11253 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082379
Display device and method of manufacturing the same Oct 27, 2020 Issued
Array ( [id] => 17908615 [patent_doc_number] => 11462477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Interconnect structure and electronic apparatus including the same [patent_app_type] => utility [patent_app_number] => 17/082494 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 59 [patent_no_of_words] => 13850 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082494
Interconnect structure and electronic apparatus including the same Oct 27, 2020 Issued
Array ( [id] => 16796113 [patent_doc_number] => 20210125930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/082530 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082530
Semiconductor memory device and apparatus including the same Oct 27, 2020 Issued
Array ( [id] => 16920415 [patent_doc_number] => 20210193507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => TITANIUM-CONTAINING DIFFUSION BARRIER FOR CMP REMOVAL RATE ENHANCEMENT AND CONTAMINATION REDUCTION [patent_app_type] => utility [patent_app_number] => 17/083230 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17083230 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/083230
Titanium-containing diffusion barrier for CMP removal rate enhancement and contamination reduction Oct 27, 2020 Issued
Array ( [id] => 18373343 [patent_doc_number] => 11653535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Display panel [patent_app_type] => utility [patent_app_number] => 17/079716 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 14587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079716
Display panel Oct 25, 2020 Issued
Array ( [id] => 20111494 [patent_doc_number] => 12362230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Method of producing a semiconductor body with a trench, semiconductor body with at least one trench and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/771350 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17771350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/771350
Method of producing a semiconductor body with a trench, semiconductor body with at least one trench and semiconductor device Oct 22, 2020 Issued
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