Search

John M. Parker

Examiner (ID: 11130, Phone: (571)272-8794 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2823, 2816
Total Applications
1173
Issued Applications
1023
Pending Applications
77
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17590779 [patent_doc_number] => 11329056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => SRAM device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/931411 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3871 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16931411 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/931411
SRAM device and manufacturing method thereof Jul 15, 2020 Issued
Array ( [id] => 16402270 [patent_doc_number] => 20200343128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => Interconnect Structure and Method of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/927204 [patent_app_country] => US [patent_app_date] => 2020-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16927204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/927204
Interconnect structure and method of forming the same Jul 12, 2020 Issued
Array ( [id] => 20177503 [patent_doc_number] => 12396268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Photovoltaic device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/624150 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17624150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/624150
Photovoltaic device and method of manufacturing the same Jul 7, 2020 Issued
Array ( [id] => 17347132 [patent_doc_number] => 20220013463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SEMICONDUCTOR PACKAGES AND FORMING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 16/924130 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924130
Semiconductor packages and forming methods thereof Jul 7, 2020 Issued
Array ( [id] => 17716612 [patent_doc_number] => 11380611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Chip-on-wafer structure with chiplet interposer [patent_app_type] => utility [patent_app_number] => 16/919298 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919298
Chip-on-wafer structure with chiplet interposer Jul 1, 2020 Issued
Array ( [id] => 16835350 [patent_doc_number] => 11011611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Semiconductor device with low resistivity contact structure [patent_app_type] => utility [patent_app_number] => 16/914638 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914638
Semiconductor device with low resistivity contact structure Jun 28, 2020 Issued
Array ( [id] => 16394459 [patent_doc_number] => 20200335400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/914747 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914747 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914747
Method of manufacturing a semiconductor device and a semiconductor device Jun 28, 2020 Issued
Array ( [id] => 17772384 [patent_doc_number] => 11404336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Power module with metal substrate [patent_app_type] => utility [patent_app_number] => 16/914725 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 5907 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914725
Power module with metal substrate Jun 28, 2020 Issued
Array ( [id] => 18120624 [patent_doc_number] => 11552023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Passive component embedded in an embedded trace substrate (ETS) [patent_app_type] => utility [patent_app_number] => 16/913288 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3821 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16913288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/913288
Passive component embedded in an embedded trace substrate (ETS) Jun 25, 2020 Issued
Array ( [id] => 16379526 [patent_doc_number] => 20200328369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/911525 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16911525 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/911525
Display device and method of manufacturing the same Jun 24, 2020 Issued
Array ( [id] => 16731227 [patent_doc_number] => 20210098375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => EMBEDDED DUAL-SIDED INTERCONNECT BRIDGES FOR INTEGRATED-CIRCUIT PACKAGES [patent_app_type] => utility [patent_app_number] => 16/912638 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912638
Embedded dual-sided interconnect bridges for integrated-circuit packages Jun 24, 2020 Issued
Array ( [id] => 19370493 [patent_doc_number] => 12062587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/911288 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4807 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16911288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/911288
Semiconductor device Jun 23, 2020 Issued
Array ( [id] => 17529909 [patent_doc_number] => 11302608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Semiconductor device with protection layers and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/908022 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 8572 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908022
Semiconductor device with protection layers and method for fabricating the same Jun 21, 2020 Issued
Array ( [id] => 18047973 [patent_doc_number] => 11521931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Microelectronic structures including bridges [patent_app_type] => utility [patent_app_number] => 16/902768 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 61 [patent_no_of_words] => 41240 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902768 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902768
Microelectronic structures including bridges Jun 15, 2020 Issued
Array ( [id] => 17295483 [patent_doc_number] => 20210391322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => PACKAGE STRUCTURES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/900996 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/900996
Package structures and methods of fabricating the same Jun 14, 2020 Issued
Array ( [id] => 16332572 [patent_doc_number] => 20200303538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/894270 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894270 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/894270
Semiconductor device Jun 4, 2020 Issued
Array ( [id] => 18000947 [patent_doc_number] => 11502058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Hybrid wafer bonding method and structure thereof [patent_app_type] => utility [patent_app_number] => 16/892993 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 11041 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892993 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/892993
Hybrid wafer bonding method and structure thereof Jun 3, 2020 Issued
Array ( [id] => 16920474 [patent_doc_number] => 20210193566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => CAPPING LAYER OVERLYING DIELECTRIC STRUCTURE TO INCREASE RELIABILITY [patent_app_type] => utility [patent_app_number] => 16/885378 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885378 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885378
Capping layer overlying dielectric structure to increase reliability May 27, 2020 Issued
Array ( [id] => 18387328 [patent_doc_number] => 11658121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Semiconductor device and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/885026 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 5458 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885026
Semiconductor device and method of forming the same May 26, 2020 Issued
Array ( [id] => 16471704 [patent_doc_number] => 20200373242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => INTEGRATED CIRCUIT WITH BACKSIDE POWER DELIVERY NETWORK AND BACKSIDE TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/874446 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874446
Integrated circuit with backside power delivery network and backside transistor May 13, 2020 Issued
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