Search

John M. Parker

Examiner (ID: 10345, Phone: (571)272-8794 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2823, 2899
Total Applications
1206
Issued Applications
1026
Pending Applications
103
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19436055 [patent_doc_number] => 20240304553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SEMICONDUCTOR DEVICE WITH FILLING LAYER AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/380883 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380883
SEMICONDUCTOR DEVICE WITH FILLING LAYER AND METHOD FOR FABRICATING THE SAME Oct 16, 2023 Pending
Array ( [id] => 18945742 [patent_doc_number] => 20240040881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/485884 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/485884
Display panel and display device Oct 11, 2023 Issued
Array ( [id] => 18898584 [patent_doc_number] => 20240014069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => METAL INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/372712 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18372712 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/372712
METAL INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME Sep 25, 2023 Pending
Array ( [id] => 19252790 [patent_doc_number] => 20240203787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICE WITH A LINER LAYER AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/368139 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368139
SEMICONDUCTOR DEVICE WITH A LINER LAYER AND METHOD FOR FABRICATING THE SAME Sep 13, 2023 Pending
Array ( [id] => 19515768 [patent_doc_number] => 20240347454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => INTERCONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/237510 [patent_app_country] => US [patent_app_date] => 2023-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18237510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/237510
INTERCONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Aug 23, 2023 Pending
Array ( [id] => 19515767 [patent_doc_number] => 20240347453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE WITH ASSISTING LAYER AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/237018 [patent_app_country] => US [patent_app_date] => 2023-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18237018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/237018
SEMICONDUCTOR DEVICE WITH ASSISTING LAYER AND METHOD FOR FABRICATING THE SAME Aug 22, 2023 Pending
Array ( [id] => 18812565 [patent_doc_number] => 20230386902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH AIR SPACER [patent_app_type] => utility [patent_app_number] => 18/232833 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232833 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232833
METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH AIR SPACER Aug 10, 2023 Pending
Array ( [id] => 18812672 [patent_doc_number] => 20230387009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => ADVANCED NODE INTERCONNECT ROUTING METHODOLOGY [patent_app_type] => utility [patent_app_number] => 18/446025 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446025 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446025
ADVANCED NODE INTERCONNECT ROUTING METHODOLOGY Aug 7, 2023 Pending
Array ( [id] => 18789327 [patent_doc_number] => 20230377982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => LEAKAGE REDUCTION METHODS AND STRUCTURES THEREOF [patent_app_type] => utility [patent_app_number] => 18/361622 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361622 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361622
LEAKAGE REDUCTION METHODS AND STRUCTURES THEREOF Jul 27, 2023 Pending
Array ( [id] => 19906625 [patent_doc_number] => 12283644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Textured optoelectronic devices and associated methods of manufacture [patent_app_type] => utility [patent_app_number] => 18/359795 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359795
Textured optoelectronic devices and associated methods of manufacture Jul 25, 2023 Issued
Array ( [id] => 19765901 [patent_doc_number] => 12224202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Forming an oxide volume within a fin [patent_app_type] => utility [patent_app_number] => 18/356780 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 9057 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356780
Forming an oxide volume within a fin Jul 20, 2023 Issued
Array ( [id] => 18757575 [patent_doc_number] => 20230361038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => TOPOLOGICAL SEMI-METAL INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 18/354331 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354331 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354331
TOPOLOGICAL SEMI-METAL INTERCONNECTS Jul 17, 2023 Pending
Array ( [id] => 18757561 [patent_doc_number] => 20230361024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => VIA LANDING ON FIRST AND SECOND BARRIER LAYERS TO REDUCE CLEANING TIME OF CONDUCTIVE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/353997 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353997
Via landing on first and second barrier layers to reduce cleaning time of conductive structure Jul 17, 2023 Issued
Array ( [id] => 18958941 [patent_doc_number] => 20240047268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHODS FOR FORMING MULTI-TIER TUNGSTEN FEATURES [patent_app_type] => utility [patent_app_number] => 18/353447 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353447
METHODS FOR FORMING MULTI-TIER TUNGSTEN FEATURES Jul 16, 2023 Pending
Array ( [id] => 18757577 [patent_doc_number] => 20230361040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => RUTHENIUM OXIDE FILM AND RUTHENIUM LINER FOR LOW-RESISTANCE COPPER INTERCONNECTS IN A DEVICE [patent_app_type] => utility [patent_app_number] => 18/352299 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352299 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352299
RUTHENIUM OXIDE FILM AND RUTHENIUM LINER FOR LOW-RESISTANCE COPPER INTERCONNECTS IN A DEVICE Jul 13, 2023 Pending
Array ( [id] => 18757584 [patent_doc_number] => 20230361047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/351946 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351946 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351946
Semiconductor device and method of manufacturing semiconductor device Jul 12, 2023 Issued
Array ( [id] => 18774372 [patent_doc_number] => 20230369203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH COMPOSITE PASSIVATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/221531 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221531 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/221531
Method for preparing semiconductor device with composite passivation structure Jul 12, 2023 Issued
Array ( [id] => 20118379 [patent_doc_number] => 12368097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Contact structures for reducing electrical shorts and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/333715 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 3499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333715 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333715
Contact structures for reducing electrical shorts and methods of forming the same Jun 12, 2023 Issued
Array ( [id] => 18679855 [patent_doc_number] => 20230317513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => FULLY ALIGNED VIA INTEGRATION WITH SELECTIVE CATALYZED VAPOR PHASE GROWN MATERIALS [patent_app_type] => utility [patent_app_number] => 18/332149 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/332149
FULLY ALIGNED VIA INTEGRATION WITH SELECTIVE CATALYZED VAPOR PHASE GROWN MATERIALS Jun 8, 2023 Pending
Array ( [id] => 18679998 [patent_doc_number] => 20230317656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/328789 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328789 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/328789
Semiconductor device Jun 4, 2023 Issued
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