Search

John M. Parker

Examiner (ID: 11130, Phone: (571)272-8794 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2823, 2816
Total Applications
1173
Issued Applications
1023
Pending Applications
77
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17660799 [patent_doc_number] => 20220181264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/677962 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677962
Electronic device package and method for manufacturing the same Feb 21, 2022 Issued
Array ( [id] => 18983539 [patent_doc_number] => 11908727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Support substrates, methods of fabricating semiconductor packages using the same, and methods of fabricating electronic devices using the same [patent_app_type] => utility [patent_app_number] => 17/671022 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 4190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671022 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671022
Support substrates, methods of fabricating semiconductor packages using the same, and methods of fabricating electronic devices using the same Feb 13, 2022 Issued
Array ( [id] => 17833821 [patent_doc_number] => 20220271125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => TRANSISTOR DEVICES HAVING SOURCE/DRAIN STRUCTURE CONFIGURED WITH HIGH GERMANIUM CONTENT PORTION [patent_app_type] => utility [patent_app_number] => 17/667821 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667821 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667821
TRANSISTOR DEVICES HAVING SOURCE/DRAIN STRUCTURE CONFIGURED WITH HIGH GERMANIUM CONTENT PORTION Feb 8, 2022 Abandoned
Array ( [id] => 17752702 [patent_doc_number] => 20220230907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 17/590257 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590257
Semiconductor device and method for manufacturing the same, and electronic apparatus Jan 31, 2022 Issued
Array ( [id] => 19972471 [patent_doc_number] => 12341092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Planar slab vias for integrated circuit interconnects [patent_app_type] => utility [patent_app_number] => 17/589766 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 5317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589766
Planar slab vias for integrated circuit interconnects Jan 30, 2022 Issued
Array ( [id] => 18999163 [patent_doc_number] => 11916019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Method for fabricating semiconductor device with programmable unit [patent_app_type] => utility [patent_app_number] => 17/582205 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9744 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582205
Method for fabricating semiconductor device with programmable unit Jan 23, 2022 Issued
Array ( [id] => 17599573 [patent_doc_number] => 20220149147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => RING STRUCTURE FOR FILM RESISTOR [patent_app_type] => utility [patent_app_number] => 17/579129 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579129
Ring structure for film resistor Jan 18, 2022 Issued
Array ( [id] => 19964911 [patent_doc_number] => 12334431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Semiconductor interconnection structures and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/577182 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 4547 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/577182
Semiconductor interconnection structures and methods of forming the same Jan 16, 2022 Issued
Array ( [id] => 18935641 [patent_doc_number] => 11888087 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-30 [patent_title] => Light emitting diodes manufacture and assembly [patent_app_type] => utility [patent_app_number] => 17/575920 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11207 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575920 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575920
Light emitting diodes manufacture and assembly Jan 13, 2022 Issued
Array ( [id] => 18500547 [patent_doc_number] => 20230223341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => LOW VIA RESISTANCE INTERCONNECT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/573461 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573461 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573461
LOW VIA RESISTANCE INTERCONNECT STRUCTURE Jan 10, 2022 Pending
Array ( [id] => 19654418 [patent_doc_number] => 12176218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Bevel etching method [patent_app_type] => utility [patent_app_number] => 17/562193 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5861 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562193 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562193
Bevel etching method Dec 26, 2021 Issued
Array ( [id] => 18473165 [patent_doc_number] => 20230207453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => SEMICONDUCTOR DEVICE WITH MULTI-STACKING CARRIER STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/561151 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561151 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561151
Semiconductor device with multi-stacking carrier structure Dec 22, 2021 Issued
Array ( [id] => 17615433 [patent_doc_number] => 20220157713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE WITH CARBON HARD MASK AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/550354 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550354
Semiconductor device with carbon hard mask and method for fabricating the same Dec 13, 2021 Issued
Array ( [id] => 20360139 [patent_doc_number] => 12476144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Etch back and film profile shaping of selective dielectric deposition [patent_app_type] => utility [patent_app_number] => 17/544337 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5633 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544337 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544337
Etch back and film profile shaping of selective dielectric deposition Dec 6, 2021 Issued
Array ( [id] => 19123513 [patent_doc_number] => 11967507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Tie bar removal for semiconductor device packaging [patent_app_type] => utility [patent_app_number] => 17/457726 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3709 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457726
Tie bar removal for semiconductor device packaging Dec 5, 2021 Issued
Array ( [id] => 17463750 [patent_doc_number] => 20220077056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR DEVICE WITH COMPOSITE PASSIVATION STRUCTURE AND METHOD FOR PREPARING THE SAME [patent_app_type] => utility [patent_app_number] => 17/529487 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17529487 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/529487
Semiconductor device with composite passivation structure and method for preparing the same Nov 17, 2021 Issued
Array ( [id] => 17463719 [patent_doc_number] => 20220077025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR DEVICE WITH PROTECTION LAYERS AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/529520 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17529520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/529520
Semiconductor device with protection layers and method for fabricating the same Nov 17, 2021 Issued
Array ( [id] => 19781537 [patent_doc_number] => 12230575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Carrier structure including pockets for accommodating semiconductor chip stack structure [patent_app_type] => utility [patent_app_number] => 17/517798 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/517798
Carrier structure including pockets for accommodating semiconductor chip stack structure Nov 2, 2021 Issued
Array ( [id] => 17431690 [patent_doc_number] => 20220059399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DIE STUCTURE WITH AIR GAPS [patent_app_type] => utility [patent_app_number] => 17/517539 [patent_app_country] => US [patent_app_date] => 2021-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/517539
Method for preparing semiconductor die structure with air gaps Nov 1, 2021 Issued
Array ( [id] => 18350877 [patent_doc_number] => 20230138988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => DUAL DAMASCENE FULLY-ALIGNED VIA INTERCONNECTS WITH DUAL ETCH LAYERS [patent_app_type] => utility [patent_app_number] => 17/514036 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514036
DUAL DAMASCENE FULLY-ALIGNED VIA INTERCONNECTS WITH DUAL ETCH LAYERS Oct 28, 2021 Pending
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