Search

John M. Parker

Examiner (ID: 11130, Phone: (571)272-8794 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2823, 2816
Total Applications
1173
Issued Applications
1023
Pending Applications
77
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17403149 [patent_doc_number] => 20220045240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => EPITAXIAL FORMATION SUPPORT STRUCTURES AND ASSOCIATED METHODS [patent_app_type] => utility [patent_app_number] => 17/510060 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510060 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/510060
Epitaxial formation support structures and associated methods Oct 24, 2021 Issued
Array ( [id] => 17963695 [patent_doc_number] => 20220344276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/509636 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/509636
Semiconductor device Oct 24, 2021 Issued
Array ( [id] => 17403007 [patent_doc_number] => 20220045098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => NOVEL 3D NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/451884 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451884
3D NAND memory device and method of forming the same Oct 21, 2021 Issued
Array ( [id] => 17477377 [patent_doc_number] => 20220084881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR STRUCTURE AND ITS MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/504800 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504800 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504800
Semiconductor structure and its manufacturing method Oct 18, 2021 Issued
Array ( [id] => 19277324 [patent_doc_number] => 12027456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/451341 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4651 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451341
Semiconductor structure and manufacturing method thereof Oct 18, 2021 Issued
Array ( [id] => 19627118 [patent_doc_number] => 12165967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Interconnection structure and manufacturing method thereof and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/501326 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4649 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501326 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501326
Interconnection structure and manufacturing method thereof and semiconductor structure Oct 13, 2021 Issued
Array ( [id] => 19356932 [patent_doc_number] => 12057389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Transistor semiconductor die with increased active area [patent_app_type] => utility [patent_app_number] => 17/501244 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 6070 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501244
Transistor semiconductor die with increased active area Oct 13, 2021 Issued
Array ( [id] => 18306687 [patent_doc_number] => 20230110587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => COPPER INTERCONNECTS WITH SELF-ALIGNED HOURGLASS-SHAPED METAL CAP [patent_app_type] => utility [patent_app_number] => 17/450470 [patent_app_country] => US [patent_app_date] => 2021-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450470
Copper interconnects with self-aligned hourglass-shaped metal cap Oct 10, 2021 Issued
Array ( [id] => 18578935 [patent_doc_number] => 11735475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Removal of barrier and liner layers from a bottom of a via [patent_app_type] => utility [patent_app_number] => 17/493102 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493102
Removal of barrier and liner layers from a bottom of a via Oct 3, 2021 Issued
Array ( [id] => 19900239 [patent_doc_number] => 12278176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Integrated circuit structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/492423 [patent_app_country] => US [patent_app_date] => 2021-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 5642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492423 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/492423
Integrated circuit structure and method for forming the same Sep 30, 2021 Issued
Array ( [id] => 18123029 [patent_doc_number] => 20230008639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => MICRO LIGHT EMITTING DIODE CHIP [patent_app_type] => utility [patent_app_number] => 17/489799 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489799
Micro light emitting diode chip Sep 29, 2021 Issued
Array ( [id] => 18264604 [patent_doc_number] => 20230085846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => THREE-DIMENSIONAL (3D) METAL-INSULATOR-METAL CAPACITOR (MIMCAP) INCLUDING STACKED VERTICAL METAL STUDS FOR INCREASED CAPACITANCE DENSITY AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/480881 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480881 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480881
THREE-DIMENSIONAL (3D) METAL-INSULATOR-METAL CAPACITOR (MIMCAP) INCLUDING STACKED VERTICAL METAL STUDS FOR INCREASED CAPACITANCE DENSITY AND RELATED FABRICATION METHODS Sep 20, 2021 Pending
Array ( [id] => 18269513 [patent_doc_number] => 20230090755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => BEOL TIP-TO-TIP SHORTING AND TIME DEPENDENT DIELECTRIC BREAKDOWN [patent_app_type] => utility [patent_app_number] => 17/481198 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481198 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481198
Beol tip-to-tip shorting and time dependent dielectric breakdown Sep 20, 2021 Issued
Array ( [id] => 17599408 [patent_doc_number] => 20220148982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => PHYSICAL UNCLONABLE FUNCTIONS WITH COPPER-SILICON OXIDE PROGRAMMABLE METALLIZATION CELLS [patent_app_type] => utility [patent_app_number] => 17/480928 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480928
Physical unclonable functions with copper-silicon oxide programmable metallization cells Sep 20, 2021 Issued
Array ( [id] => 18250721 [patent_doc_number] => 20230077760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => TOP VIA INTERCONNECTS WITHOUT BARRIER METAL BETWEEN VIA AND ABOVE LINE [patent_app_type] => utility [patent_app_number] => 17/474222 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474222
Top via interconnects without barrier metal between via and above line Sep 13, 2021 Issued
Array ( [id] => 19654543 [patent_doc_number] => 12176344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Methods of forming semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/465867 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465867
Methods of forming semiconductor structure Sep 2, 2021 Issued
Array ( [id] => 19539387 [patent_doc_number] => 12131944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Slurry composition, semiconductor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/460929 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460929
Slurry composition, semiconductor structure and method for forming the same Aug 29, 2021 Issued
Array ( [id] => 18223831 [patent_doc_number] => 20230062825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/461161 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461161
Semiconductor structure and method for forming the same Aug 29, 2021 Issued
Array ( [id] => 18228569 [patent_doc_number] => 20230067563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING AIR GAPS AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/461152 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461152 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461152
Semiconductor structure having air gaps and method for manufacturing the same Aug 29, 2021 Issued
Array ( [id] => 18229766 [patent_doc_number] => 20230068760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING AIR GAPS AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/460628 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460628
Semiconductor structure having air gaps and method for manufacturing the same Aug 29, 2021 Issued
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