
John M. Sollecito
Examiner (ID: 15396)
| Most Active Art Unit | 3404 |
| Art Unit(s) | 3404, 3744 |
| Total Applications | 998 |
| Issued Applications | 895 |
| Pending Applications | 31 |
| Abandoned Applications | 72 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[patent_title] => 'Non-volatile semiconductor memory segregating sequential, random, and system data to reduce garbage collection for page based mapping'
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[patent_app_number] => 12/607011
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Array
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[patent_title] => 'Scalable hash tables'
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Array
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[patent_issue_date] => 2014-07-08
[patent_title] => 'Block management method for a flash memory and flash memory controller and storage system using the same'
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Array
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[patent_title] => 'MANAGING ALLOCATION AND DEALLOCATION OF STORAGE FOR DATA OBJECTS'
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Array
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[patent_title] => 'Data storage device with integrated DNA storage media'
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Array
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[patent_title] => 'Block boundary resolution for mismatched logical and physical block sizes'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/588263 | Memory management unit | Oct 7, 2009 | Issued |
Array
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[patent_title] => 'DISTRIBUTED RDC CHUNK STORE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/484548 | DISTRIBUTED RDC CHUNK STORE | Jun 14, 2009 | Abandoned |
Array
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[id] => 5375864
[patent_doc_number] => 20090313425
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[patent_issue_date] => 2009-12-17
[patent_title] => 'MEMORY CONTROL APPARATUS, CONTENT PLAYBACK APPARATUS, CONTROL METHOD AND RECORDING MEDIUM'
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Array
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[patent_title] => 'Computing system and backup method'
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Array
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[patent_title] => 'Memory Control Unit Mapping Physical Address to DRAM Address for a Non-Power-of-Two Number of Memory Ranks Using Lower Order Physical Address Bits'
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Array
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Array
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Array
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Array
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