Search

John M. Sollecito

Examiner (ID: 15396)

Most Active Art Unit
3404
Art Unit(s)
3404, 3744
Total Applications
998
Issued Applications
895
Pending Applications
31
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5668737 [patent_doc_number] => 20060174087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Computer system, computer, storage system, and control terminal' [patent_app_type] => utility [patent_app_number] => 11/133821 [patent_app_country] => US [patent_app_date] => 2005-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 17891 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20060174087.pdf [firstpage_image] =>[orig_patent_app_number] => 11133821 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/133821
Computer system, computer, storage system, and control terminal May 19, 2005 Abandoned
Array ( [id] => 5627043 [patent_doc_number] => 20060265548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Method for operating a PMC memory cell and CBRAM memory circuit' [patent_app_type] => utility [patent_app_number] => 11/133716 [patent_app_country] => US [patent_app_date] => 2005-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5842 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20060265548.pdf [firstpage_image] =>[orig_patent_app_number] => 11133716 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/133716
Method for operating an integrated circuit having a resistivity changing memory cell May 19, 2005 Issued
Array ( [id] => 5752572 [patent_doc_number] => 20060221721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Computer system, storage device and computer software and data migration method' [patent_app_type] => utility [patent_app_number] => 11/133771 [patent_app_country] => US [patent_app_date] => 2005-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9689 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20060221721.pdf [firstpage_image] =>[orig_patent_app_number] => 11133771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/133771
Computer system, storage device and computer software and data migration method May 18, 2005 Abandoned
Array ( [id] => 7109778 [patent_doc_number] => 20050207232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Access method for a NAND flash memory chip, and corresponding NAND flash memory chip' [patent_app_type] => utility [patent_app_number] => 11/083783 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7426 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20050207232.pdf [firstpage_image] =>[orig_patent_app_number] => 11083783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083783
Access method for a NAND flash memory chip, and corresponding NAND flash memory chip Mar 17, 2005 Abandoned
Array ( [id] => 5761714 [patent_doc_number] => 20060212659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Systems and arrangements for promoting a line from shared to exclusive in a cache' [patent_app_type] => utility [patent_app_number] => 11/083615 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5660 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20060212659.pdf [firstpage_image] =>[orig_patent_app_number] => 11083615 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083615
Systems and arrangements for promoting a line to exclusive in a fill buffer of a cache Mar 17, 2005 Issued
Array ( [id] => 97100 [patent_doc_number] => 07739423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Bulk transfer of information on network device' [patent_app_type] => utility [patent_app_number] => 11/082976 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2996 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/739/07739423.pdf [firstpage_image] =>[orig_patent_app_number] => 11082976 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/082976
Bulk transfer of information on network device Mar 17, 2005 Issued
Array ( [id] => 261821 [patent_doc_number] => 07574555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Memory system having daisy chained memory controllers' [patent_app_type] => utility [patent_app_number] => 11/083571 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2610 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/574/07574555.pdf [firstpage_image] =>[orig_patent_app_number] => 11083571 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083571
Memory system having daisy chained memory controllers Mar 17, 2005 Issued
Array ( [id] => 5761709 [patent_doc_number] => 20060212654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Method and apparatus for intelligent instruction caching using application characteristics' [patent_app_type] => utility [patent_app_number] => 11/083795 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8896 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20060212654.pdf [firstpage_image] =>[orig_patent_app_number] => 11083795 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083795
Method and apparatus for intelligent instruction caching using application characteristics Mar 17, 2005 Abandoned
Array ( [id] => 5668725 [patent_doc_number] => 20060174075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Method for creating and preserving snapshots in a storage system' [patent_app_type] => utility [patent_app_number] => 11/065247 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8249 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20060174075.pdf [firstpage_image] =>[orig_patent_app_number] => 11065247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/065247
Method for creating and preserving snapshots in a storage system Feb 24, 2005 Abandoned
Array ( [id] => 929610 [patent_doc_number] => 07315922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-01 [patent_title] => 'Disk array apparatus, information processing apparatus, data management system, method for issuing command from target side to initiator side, and computer product' [patent_app_type] => utility [patent_app_number] => 11/065229 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8321 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/315/07315922.pdf [firstpage_image] =>[orig_patent_app_number] => 11065229 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/065229
Disk array apparatus, information processing apparatus, data management system, method for issuing command from target side to initiator side, and computer product Feb 24, 2005 Issued
Array ( [id] => 5706605 [patent_doc_number] => 20060195653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Switchable mass storage system' [patent_app_type] => utility [patent_app_number] => 11/065552 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20060195653.pdf [firstpage_image] =>[orig_patent_app_number] => 11065552 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/065552
Switchable mass storage system Feb 24, 2005 Abandoned
Array ( [id] => 6946601 [patent_doc_number] => 20050198438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Shared-memory multiprocessor' [patent_app_type] => utility [patent_app_number] => 11/065259 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9448 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20050198438.pdf [firstpage_image] =>[orig_patent_app_number] => 11065259 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/065259
Shared-memory multiprocessor Feb 24, 2005 Abandoned
Array ( [id] => 5621017 [patent_doc_number] => 20060190552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Data retention system with a plurality of access protocols' [patent_app_type] => utility [patent_app_number] => 11/065690 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7982 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20060190552.pdf [firstpage_image] =>[orig_patent_app_number] => 11065690 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/065690
Data retention system with a plurality of access protocols Feb 23, 2005 Abandoned
Array ( [id] => 245049 [patent_doc_number] => 07590793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-15 [patent_title] => 'Data access controlling method in flash memory and data access controlling program' [patent_app_type] => utility [patent_app_number] => 11/060475 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/590/07590793.pdf [firstpage_image] =>[orig_patent_app_number] => 11060475 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/060475
Data access controlling method in flash memory and data access controlling program Feb 17, 2005 Issued
Array ( [id] => 5679380 [patent_doc_number] => 20060184736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Apparatus, system, and method for storing modified data' [patent_app_type] => utility [patent_app_number] => 11/061187 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5867 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184736.pdf [firstpage_image] =>[orig_patent_app_number] => 11061187 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/061187
Apparatus, system, and method for storing modified data Feb 16, 2005 Abandoned
Array ( [id] => 4592740 [patent_doc_number] => 07853716 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-14 [patent_title] => 'Data storage system having packet switching network with latency arbitration' [patent_app_type] => utility [patent_app_number] => 11/059961 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8350 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/853/07853716.pdf [firstpage_image] =>[orig_patent_app_number] => 11059961 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059961
Data storage system having packet switching network with latency arbitration Feb 16, 2005 Issued
Array ( [id] => 4440877 [patent_doc_number] => 07971006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'System and method for handling status commands directed to partitioned media library' [patent_app_type] => utility [patent_app_number] => 11/046019 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9064 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/971/07971006.pdf [firstpage_image] =>[orig_patent_app_number] => 11046019 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/046019
System and method for handling status commands directed to partitioned media library Jan 27, 2005 Issued
Array ( [id] => 5879110 [patent_doc_number] => 20060168403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Intelligent cache management' [patent_app_type] => utility [patent_app_number] => 11/044962 [patent_app_country] => US [patent_app_date] => 2005-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4443 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20060168403.pdf [firstpage_image] =>[orig_patent_app_number] => 11044962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/044962
Intelligent cache management Jan 26, 2005 Issued
Array ( [id] => 5878023 [patent_doc_number] => 20060167961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Autonomic cache object array based on heap usage' [patent_app_type] => utility [patent_app_number] => 11/044970 [patent_app_country] => US [patent_app_date] => 2005-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5244 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20060167961.pdf [firstpage_image] =>[orig_patent_app_number] => 11044970 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/044970
Autonomic cache object array based on heap usage Jan 26, 2005 Abandoned
Array ( [id] => 5695793 [patent_doc_number] => 20060155940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Multi-queue FIFO memory systems that utilize read chip select and device identification codes to control one-at-a-time bus access between selected FIFO memory chips' [patent_app_type] => utility [patent_app_number] => 11/044413 [patent_app_country] => US [patent_app_date] => 2005-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4651 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20060155940.pdf [firstpage_image] =>[orig_patent_app_number] => 11044413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/044413
Multi-queue FIFO memory systems that utilize read chip select and device identification codes to control one-at-a-time bus access between selected FIFO memory chips Jan 26, 2005 Abandoned
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