John M. Sollecito

Array ( [id] => 922543 [patent_doc_number] => 07321961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-22 [patent_title] => 'Method and apparatus to avoid collisions between row activate and column read or column write commands' [patent_app_type] => utility [patent_app_number] => 11/008792 [patent_app_country] => US [patent_app_date] => 2004-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6218 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/321/07321961.pdf [firstpage_image] =>[orig_patent_app_number] => 11008792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5840729 [patent_doc_number] => 20060120235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'System and method of erasing non-volatile recording media' [patent_app_type] => utility [patent_app_number] => 11/006120 [patent_app_country] => US [patent_app_date] => 2004-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4555 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20060120235.pdf [firstpage_image] =>[orig_patent_app_number] => 11006120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5717140 [patent_doc_number] => 20060080503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Storage system and control method of the same' [patent_app_type] => utility [patent_app_number] => 11/003075 [patent_app_country] => US [patent_app_date] => 2004-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20060080503.pdf [firstpage_image] =>[orig_patent_app_number] => 11003075 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5846905 [patent_doc_number] => 20060123194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Variable effective depth write buffer and methods thereof' [patent_app_type] => utility [patent_app_number] => 11/001002 [patent_app_country] => US [patent_app_date] => 2004-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2857 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20060123194.pdf [firstpage_image] =>[orig_patent_app_number] => 11001002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5773991 [patent_doc_number] => 20050268036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Storage configuration' [patent_app_type] => utility [patent_app_number] => 10/999178 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2276 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20050268036.pdf [firstpage_image] =>[orig_patent_app_number] => 10999178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5615226 [patent_doc_number] => 20060117155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Micro-threaded memory' [patent_app_type] => utility [patent_app_number] => 10/998402 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 21966 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20060117155.pdf [firstpage_image] =>[orig_patent_app_number] => 10998402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5728540 [patent_doc_number] => 20060059301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Storage apparatus and method for relocating volumes thereof' [patent_app_type] => utility [patent_app_number] => 10/982912 [patent_app_country] => US [patent_app_date] => 2004-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6156 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20060059301.pdf [firstpage_image] =>[orig_patent_app_number] => 10982912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5906761 [patent_doc_number] => 20060047907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Storage system and a storage management system' [patent_app_type] => utility [patent_app_number] => 10/971904 [patent_app_country] => US [patent_app_date] => 2004-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 28298 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20060047907.pdf [firstpage_image] =>[orig_patent_app_number] => 10971904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5867059 [patent_doc_number] => 20060101190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Apparatus, system, and method for deliberately preventing unauthorized access to data stored in a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 10/969834 [patent_app_country] => US [patent_app_date] => 2004-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6342 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20060101190.pdf [firstpage_image] =>[orig_patent_app_number] => 10969834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5852866 [patent_doc_number] => 20060236057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Memory access method with delayed write control signal and data processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/963257 [patent_app_country] => US [patent_app_date] => 2004-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4458 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20060236057.pdf [firstpage_image] =>[orig_patent_app_number] => 10963257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5717138 [patent_doc_number] => 20060080501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'HDD having both dram and flash memory' [patent_app_type] => utility [patent_app_number] => 10/963190 [patent_app_country] => US [patent_app_date] => 2004-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2409 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20060080501.pdf [firstpage_image] =>[orig_patent_app_number] => 10963190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5717001 [patent_doc_number] => 20060080364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Method, system, and computer program product for detecting memory management anti-patterns' [patent_app_type] => utility [patent_app_number] => 10/960184 [patent_app_country] => US [patent_app_date] => 2004-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4397 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20060080364.pdf [firstpage_image] =>[orig_patent_app_number] => 10960184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5775512 [patent_doc_number] => 20060104152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Controlling an addressable array of circuits' [patent_app_type] => utility [patent_app_number] => 10/960998 [patent_app_country] => US [patent_app_date] => 2004-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2172 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20060104152.pdf [firstpage_image] =>[orig_patent_app_number] => 10960998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 332967 [patent_doc_number] => 07512769 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-31 [patent_title] => 'Process migration' [patent_app_type] => utility [patent_app_number] => 10/959714 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5250 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/512/07512769.pdf [firstpage_image] =>[orig_patent_app_number] => 10959714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5722501 [patent_doc_number] => 20060075278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Method of forming virtual computer cluster within shared computing environment' [patent_app_type] => utility [patent_app_number] => 10/959536 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6480 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20060075278.pdf [firstpage_image] =>[orig_patent_app_number] => 10959536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5722423 [patent_doc_number] => 20060075199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Method of providing storage to virtual computer cluster within shared computing environment' [patent_app_type] => utility [patent_app_number] => 10/959851 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6557 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20060075199.pdf [firstpage_image] =>[orig_patent_app_number] => 10959851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5722432 [patent_doc_number] => 20060075208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Microprocessor instruction using address index values to enable access of a virtual buffer in circular fashion' [patent_app_type] => utility [patent_app_number] => 10/956498 [patent_app_country] => US [patent_app_date] => 2004-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7919 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20060075208.pdf [firstpage_image] =>[orig_patent_app_number] => 10956498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 241364 [patent_doc_number] => 07594089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Smart memory based synchronization controller for a multi-threaded multiprocessor SoC' [patent_app_type] => utility [patent_app_number] => 10/955231 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 11685 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 332 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/594/07594089.pdf [firstpage_image] =>[orig_patent_app_number] => 10955231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4905526 [patent_doc_number] => 20080114940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'Data Processor' [patent_app_type] => utility [patent_app_number] => 11/663592 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8011 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20080114940.pdf [firstpage_image] =>[orig_patent_app_number] => 11663592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 283910 [patent_doc_number] => 07555616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Devices and methods for memory tag error correction' [patent_app_type] => utility [patent_app_number] => 10/947171 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3643 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/555/07555616.pdf [firstpage_image] =>[orig_patent_app_number] => 10947171 [rel_patent_id] =>[rel_patent_doc_number] =>)