| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3808652
[patent_doc_number] => 05727218
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Controlling an apparatus disposed for adapting fiber channel transmissions to an industry standard data bus'
[patent_app_type] => 1
[patent_app_number] => 8/611141
[patent_app_country] => US
[patent_app_date] => 1996-03-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/727/05727218.pdf
[firstpage_image] =>[orig_patent_app_number] => 611141
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/611141 | Controlling an apparatus disposed for adapting fiber channel transmissions to an industry standard data bus | Mar 4, 1996 | Issued |
Array
(
[id] => 3847723
[patent_doc_number] => 05740377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Electronic device for computer'
[patent_app_type] => 1
[patent_app_number] => 8/609165
[patent_app_country] => US
[patent_app_date] => 1996-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/740/05740377.pdf
[firstpage_image] =>[orig_patent_app_number] => 609165
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/609165 | Electronic device for computer | Feb 29, 1996 | Issued |
Array
(
[id] => 3785366
[patent_doc_number] => 05734914
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Computer system capable of shifting voltage level of data signal between processor and system memory'
[patent_app_type] => 1
[patent_app_number] => 8/609615
[patent_app_country] => US
[patent_app_date] => 1996-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4649
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/734/05734914.pdf
[firstpage_image] =>[orig_patent_app_number] => 609615
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/609615 | Computer system capable of shifting voltage level of data signal between processor and system memory | Feb 29, 1996 | Issued |
Array
(
[id] => 3634048
[patent_doc_number] => 05689657
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'Apparatus and methods for bus arbitration in a multimaster system'
[patent_app_type] => 1
[patent_app_number] => 8/599444
[patent_app_country] => US
[patent_app_date] => 1996-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6462
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/689/05689657.pdf
[firstpage_image] =>[orig_patent_app_number] => 599444
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/599444 | Apparatus and methods for bus arbitration in a multimaster system | Jan 17, 1996 | Issued |
| 08/585607 | ISDN-BASED HIGH SPEED COMMUNICATION SYSTEM | Jan 10, 1996 | Abandoned |
Array
(
[id] => 3836151
[patent_doc_number] => 05790813
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Pre-arbitration system allowing look-around and bypass for significant operations'
[patent_app_type] => 1
[patent_app_number] => 8/583366
[patent_app_country] => US
[patent_app_date] => 1996-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/790/05790813.pdf
[firstpage_image] =>[orig_patent_app_number] => 583366
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583366 | Pre-arbitration system allowing look-around and bypass for significant operations | Jan 4, 1996 | Issued |
Array
(
[id] => 3668019
[patent_doc_number] => 05623675
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Printing system, and method of receiving and processing interrupt request in printer'
[patent_app_type] => 1
[patent_app_number] => 8/580772
[patent_app_country] => US
[patent_app_date] => 1995-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/623/05623675.pdf
[firstpage_image] =>[orig_patent_app_number] => 580772
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580772 | Printing system, and method of receiving and processing interrupt request in printer | Dec 28, 1995 | Issued |
Array
(
[id] => 3741443
[patent_doc_number] => 05671369
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Bus grant overlap circuit'
[patent_app_type] => 1
[patent_app_number] => 8/587772
[patent_app_country] => US
[patent_app_date] => 1995-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2505
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 190
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/671/05671369.pdf
[firstpage_image] =>[orig_patent_app_number] => 587772
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/587772 | Bus grant overlap circuit | Dec 21, 1995 | Issued |
Array
(
[id] => 3785313
[patent_doc_number] => 05734910
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Integrating multi-modal synchronous interrupt handlers for computer system'
[patent_app_type] => 1
[patent_app_number] => 8/577831
[patent_app_country] => US
[patent_app_date] => 1995-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6545
[patent_no_of_claims] => 14
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[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/734/05734910.pdf
[firstpage_image] =>[orig_patent_app_number] => 577831
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/577831 | Integrating multi-modal synchronous interrupt handlers for computer system | Dec 21, 1995 | Issued |
Array
(
[id] => 3807984
[patent_doc_number] => 05727173
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Toggle bus circuit'
[patent_app_type] => 1
[patent_app_number] => 8/567172
[patent_app_country] => US
[patent_app_date] => 1995-12-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/727/05727173.pdf
[firstpage_image] =>[orig_patent_app_number] => 567172
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567172 | Toggle bus circuit | Dec 4, 1995 | Issued |
Array
(
[id] => 3894981
[patent_doc_number] => 05764996
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Method and apparatus for optimizing PCI interrupt binding and associated latency in extended/bridged PCI busses'
[patent_app_type] => 1
[patent_app_number] => 8/563221
[patent_app_country] => US
[patent_app_date] => 1995-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1991
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[pdf_file] => patents/05/764/05764996.pdf
[firstpage_image] =>[orig_patent_app_number] => 563221
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/563221 | Method and apparatus for optimizing PCI interrupt binding and associated latency in extended/bridged PCI busses | Nov 26, 1995 | Issued |
Array
(
[id] => 3718883
[patent_doc_number] => 05655125
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Register for identifying processor characteristics'
[patent_app_type] => 1
[patent_app_number] => 8/551320
[patent_app_country] => US
[patent_app_date] => 1995-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/655/05655125.pdf
[firstpage_image] =>[orig_patent_app_number] => 551320
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/551320 | Register for identifying processor characteristics | Oct 31, 1995 | Issued |
| 08/551230 | SUBSETTABLE TOP LEVEL CACHE | Oct 30, 1995 | Abandoned |
Array
(
[id] => 3741475
[patent_doc_number] => 05671371
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Bus control system'
[patent_app_type] => 1
[patent_app_number] => 8/544727
[patent_app_country] => US
[patent_app_date] => 1995-10-18
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[pdf_file] => patents/05/671/05671371.pdf
[firstpage_image] =>[orig_patent_app_number] => 544727
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/544727 | Bus control system | Oct 17, 1995 | Issued |
| 08/533489 | TECHNIQUE FOR EXECUTING TRANSLATED SOFTWARE USING TRANSLATED SYSTEM SOFTWARE | Sep 24, 1995 | Abandoned |
Array
(
[id] => 3635357
[patent_doc_number] => 05613081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-18
[patent_title] => 'Method of operating a data processor with rapid address comparison for data forwarding'
[patent_app_type] => 1
[patent_app_number] => 8/526398
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[patent_app_date] => 1995-09-11
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[pdf_file] => patents/05/613/05613081.pdf
[firstpage_image] =>[orig_patent_app_number] => 526398
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/526398 | Method of operating a data processor with rapid address comparison for data forwarding | Sep 10, 1995 | Issued |
Array
(
[id] => 3784258
[patent_doc_number] => 05734840
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'PCI and expansion bus riser card'
[patent_app_type] => 1
[patent_app_number] => 8/516765
[patent_app_country] => US
[patent_app_date] => 1995-08-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/734/05734840.pdf
[firstpage_image] =>[orig_patent_app_number] => 516765
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/516765 | PCI and expansion bus riser card | Aug 17, 1995 | Issued |
| 08/514565 | ACCOMMODATING COMPONENTS WITH VARYING DIGITAL LOGIC SUPPLY VOLTAGE REQUIREMENTS | Aug 13, 1995 | Abandoned |
Array
(
[id] => 4169401
[patent_doc_number] => 06158903
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Apparatus and method for allowing computer systems with different input/output devices to collaboratively edit data'
[patent_app_type] => 1
[patent_app_number] => 8/510885
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[pdf_file] => patents/06/158/06158903.pdf
[firstpage_image] =>[orig_patent_app_number] => 510885
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/510885 | Apparatus and method for allowing computer systems with different input/output devices to collaboratively edit data | Aug 2, 1995 | Issued |
Array
(
[id] => 3700924
[patent_doc_number] => 05692133
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Arrangement having several functional units'
[patent_app_type] => 1
[patent_app_number] => 8/454165
[patent_app_country] => US
[patent_app_date] => 1995-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/692/05692133.pdf
[firstpage_image] =>[orig_patent_app_number] => 454165
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/454165 | Arrangement having several functional units | Jul 19, 1995 | Issued |