Search

John M. Winter

Examiner (ID: 13780, Phone: (571)272-6713 , Office: P/3685 )

Most Active Art Unit
3685
Art Unit(s)
3685, 3621
Total Applications
697
Issued Applications
256
Pending Applications
52
Abandoned Applications
389

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15886661 [patent_doc_number] => 10649675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Storage controller, storage device, data processing method, and computer program product [patent_app_type] => utility [patent_app_number] => 15/259657 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10052 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259657 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/259657
Storage controller, storage device, data processing method, and computer program product Sep 7, 2016 Issued
Array ( [id] => 12234800 [patent_doc_number] => 20180067663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'MANAGING UNEQUAL NETWORK SHARED DISKS (NSD) IN A COMPUTER NETWORK' [patent_app_type] => utility [patent_app_number] => 15/259364 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15259364 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/259364
Managing unequal network shared disks (NSD) in a computer network Sep 7, 2016 Issued
Array ( [id] => 18414925 [patent_doc_number] => 11669467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Memory access instructions [patent_app_type] => utility [patent_app_number] => 15/768909 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3255 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15768909 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/768909
Memory access instructions Sep 5, 2016 Issued
Array ( [id] => 11292434 [patent_doc_number] => 20160342367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'SYSTEM AND METHOD FOR CONSISTENT PERFORMANCE IN A STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/230097 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6589 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15230097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/230097
System and method for consistent performance in a storage device Aug 4, 2016 Issued
Array ( [id] => 12153679 [patent_doc_number] => 20180024944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'METHODS AND APPARATUS FOR ACCESS CONTROL IN SHARED VIRTUAL MEMORY CONFIGURATIONS' [patent_app_type] => utility [patent_app_number] => 15/217728 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6810 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217728 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217728
METHODS AND APPARATUS FOR ACCESS CONTROL IN SHARED VIRTUAL MEMORY CONFIGURATIONS Jul 21, 2016 Abandoned
Array ( [id] => 11403788 [patent_doc_number] => 20170024326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'Method and Apparatus for Caching Flash Translation Layer (FTL) Table' [patent_app_type] => utility [patent_app_number] => 15/217934 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217934 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217934
Method and Apparatus for Caching Flash Translation Layer (FTL) Table Jul 21, 2016 Abandoned
Array ( [id] => 12986377 [patent_doc_number] => 20170344487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => MULTI-BIT DATA REPRESENTATION FRAMEWORK TO ENABLE DUAL PROGRAM OPERATION ON SOLID-STATE FLASH DEVICES [patent_app_type] => utility [patent_app_number] => 15/217964 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217964 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217964
Multi-bit data representation framework to enable dual program operation on solid-state flash devices Jul 21, 2016 Issued
Array ( [id] => 12153346 [patent_doc_number] => 20180024610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'APPARATUS AND METHOD FOR SETTING A CLOCK SPEED/VOLTAGE OF CACHE MEMORY BASED ON MEMORY REQUEST INFORMATION' [patent_app_type] => utility [patent_app_number] => 15/217911 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217911 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217911
APPARATUS AND METHOD FOR SETTING A CLOCK SPEED/VOLTAGE OF CACHE MEMORY BASED ON MEMORY REQUEST INFORMATION Jul 21, 2016 Abandoned
Array ( [id] => 16045821 [patent_doc_number] => 10684781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-16 [patent_title] => Big data read-write reduction [patent_app_type] => utility [patent_app_number] => 15/216493 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216493 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216493
Big data read-write reduction Jul 20, 2016 Issued
Array ( [id] => 15472369 [patent_doc_number] => 10552058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-04 [patent_title] => Techniques for delegating data processing to a cooperative memory controller [patent_app_type] => utility [patent_app_number] => 15/211927 [patent_app_country] => US [patent_app_date] => 2016-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 26903 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15211927 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/211927
Techniques for delegating data processing to a cooperative memory controller Jul 14, 2016 Issued
Array ( [id] => 12140181 [patent_doc_number] => 20180018264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'SYSTEM AND METHOD FOR IDENTIFYING PENDENCY OF A MEMORY ACCESS REQUEST AT A CACHE ENTRY' [patent_app_type] => utility [patent_app_number] => 15/211547 [patent_app_country] => US [patent_app_date] => 2016-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15211547 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/211547
System and method for identifying pendency of a memory access request at a cache entry Jul 14, 2016 Issued
Array ( [id] => 14218335 [patent_doc_number] => 20190121552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => DETERMINING A DEVICE WEAR-RATE [patent_app_type] => utility [patent_app_number] => 16/091050 [patent_app_country] => US [patent_app_date] => 2016-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16091050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/091050
Determining a device wear-rate Jul 7, 2016 Issued
Array ( [id] => 13721685 [patent_doc_number] => 20170371797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => PRE-FETCH MECHANISM FOR COMPRESSED MEMORY LINES IN A PROCESSOR-BASED SYSTEM [patent_app_type] => utility [patent_app_number] => 15/192984 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192984 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192984
PRE-FETCH MECHANISM FOR COMPRESSED MEMORY LINES IN A PROCESSOR-BASED SYSTEM Jun 23, 2016 Abandoned
Array ( [id] => 15859437 [patent_doc_number] => 10645025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Object memory management unit [patent_app_type] => utility [patent_app_number] => 15/177567 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9580 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177567 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177567
Object memory management unit Jun 8, 2016 Issued
Array ( [id] => 11077831 [patent_doc_number] => 20160274795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'Server Based Disaster Recovery by Making Use of Dual Write Responses' [patent_app_type] => utility [patent_app_number] => 15/166470 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7134 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166470 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/166470
Server based disaster recovery by making use of dual write responses May 26, 2016 Issued
Array ( [id] => 15919211 [patent_doc_number] => 10656843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Systems and methods for wear levelling in a storage array [patent_app_type] => utility [patent_app_number] => 15/155678 [patent_app_country] => US [patent_app_date] => 2016-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5946 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15155678 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/155678
Systems and methods for wear levelling in a storage array May 15, 2016 Issued
Array ( [id] => 11423487 [patent_doc_number] => 20170031631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'STORAGE DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/134791 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 17768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134791
Storage device and method of operating the same Apr 20, 2016 Issued
Array ( [id] => 11385736 [patent_doc_number] => 20170011792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'EMBEDDED REFRESH CONTROLLERS AND MEMORY DEVICES INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/134637 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 10322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134637 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134637
Embedded refresh controllers and memory devices including the same Apr 20, 2016 Issued
Array ( [id] => 12004311 [patent_doc_number] => 20170308466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'METHOD AND SYSTEM FOR IMPLEMENTING LOCK FREE SHARED MEMORY WITH SINGLE WRITER AND MULTIPLE READERS' [patent_app_type] => utility [patent_app_number] => 15/134537 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5826 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134537
Method and system for implementing lock free shared memory with single writer and multiple readers Apr 20, 2016 Issued
Array ( [id] => 15017345 [patent_doc_number] => 10454845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Object memory management unit [patent_app_type] => utility [patent_app_number] => 15/134053 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9561 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134053 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/134053
Object memory management unit Apr 19, 2016 Issued
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