Search

John M. Zaleskas

Examiner (ID: 19026, Phone: (571)272-5958 , Office: P/3747 )

Most Active Art Unit
3747
Art Unit(s)
3747
Total Applications
711
Issued Applications
422
Pending Applications
59
Abandoned Applications
240

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8834454 [patent_doc_number] => 08450210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-28 [patent_title] => 'Sequential station tool for wet processing of semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 13/218283 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8845 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13218283 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/218283
Sequential station tool for wet processing of semiconductor wafers Aug 24, 2011 Issued
Array ( [id] => 9127734 [patent_doc_number] => 08575685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Buried field ring field effect transistor (BUF-FET) integrated with cells implanted with hole supply path' [patent_app_type] => utility [patent_app_number] => 13/199381 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 2794 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13199381 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/199381
Buried field ring field effect transistor (BUF-FET) integrated with cells implanted with hole supply path Aug 24, 2011 Issued
Array ( [id] => 8310462 [patent_doc_number] => 20120187484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/216963 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216963
LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE Aug 23, 2011 Abandoned
Array ( [id] => 9375608 [patent_doc_number] => 08679871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Method of manufacturing light emitting device that includes using atomic layer deposition to form protective film on reflective film' [patent_app_type] => utility [patent_app_number] => 13/217073 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 5305 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217073 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217073
Method of manufacturing light emitting device that includes using atomic layer deposition to form protective film on reflective film Aug 23, 2011 Issued
Array ( [id] => 7805302 [patent_doc_number] => 20120056254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'SPIN INJECTION ELECTRODE STRUCTURE, SPIN TRANSPORT ELEMENT, AND SPIN TRANSPORT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/216965 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9956 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20120056254.pdf [firstpage_image] =>[orig_patent_app_number] => 13216965 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216965
Spin injection electrode structure, spin transport element, and spin transport device Aug 23, 2011 Issued
Array ( [id] => 8680851 [patent_doc_number] => 20130049136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'COMBINED PLANAR FET AND FIN-FET DEVICES AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/217061 [patent_app_country] => US [patent_app_date] => 2011-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217061 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217061
Electronic device having plural FIN-FETs with different FIN heights and planar FETs on the same substrate Aug 23, 2011 Issued
Array ( [id] => 9355939 [patent_doc_number] => 08674478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Semiconductor device having capacitor with upper electrode whose circumference is made long' [patent_app_type] => utility [patent_app_number] => 13/212541 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7223 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212541
Semiconductor device having capacitor with upper electrode whose circumference is made long Aug 17, 2011 Issued
Array ( [id] => 8955847 [patent_doc_number] => 08501619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'Methods for forming a plurality of contact holes in a microelectronic device' [patent_app_type] => utility [patent_app_number] => 13/212065 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 4901 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212065
Methods for forming a plurality of contact holes in a microelectronic device Aug 16, 2011 Issued
Array ( [id] => 7651414 [patent_doc_number] => 20110300683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Semiconductor device and method of forming the same' [patent_app_type] => utility [patent_app_number] => 13/137420 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15160 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300683.pdf [firstpage_image] =>[orig_patent_app_number] => 13137420 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137420
Method of forming semiconductor device having common node that contacts plural stacked active elements and that has resistive memory elements corresponding to the active elements Aug 14, 2011 Issued
Array ( [id] => 7580353 [patent_doc_number] => 20110294236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'Semiconductor device and method of manufacturing it' [patent_app_type] => utility [patent_app_number] => 13/137339 [patent_app_country] => US [patent_app_date] => 2011-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 17606 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20110294236.pdf [firstpage_image] =>[orig_patent_app_number] => 13137339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137339
Semiconductor device and method of manufacturing it Aug 7, 2011 Issued
Array ( [id] => 7564919 [patent_doc_number] => 20110284982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'BACKSIDE-ILLUMINATED (BSI) IMAGE SENSOR WITH BACKSIDE DIFFUSION DOPING' [patent_app_type] => utility [patent_app_number] => 13/198574 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20110284982.pdf [firstpage_image] =>[orig_patent_app_number] => 13198574 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198574
Backside-illuminated (BSI) image sensor with backside diffusion doping Aug 3, 2011 Issued
Array ( [id] => 7567503 [patent_doc_number] => 20110287566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'METHOD FOR FABRICATING AN ELECTROLUMINESCENCE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/196388 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5968 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20110287566.pdf [firstpage_image] =>[orig_patent_app_number] => 13196388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196388
Method for fabricating an electroluminescence device Aug 1, 2011 Issued
Array ( [id] => 8555065 [patent_doc_number] => 08329536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Method for manufacturing semiconductor device with silicon nitride charge trapping film having varying hydrogen concentration' [patent_app_type] => utility [patent_app_number] => 13/191830 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 105 [patent_no_of_words] => 30344 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191830 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191830
Method for manufacturing semiconductor device with silicon nitride charge trapping film having varying hydrogen concentration Jul 26, 2011 Issued
Array ( [id] => 8901159 [patent_doc_number] => 20130168662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'Method of Forming a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 13/807190 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5781 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13807190 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/807190
Method of forming organic semiconductor device that includes forming electrode contact layer by treating electrode surfaces with substance containing substituted arene Jun 29, 2011 Issued
Array ( [id] => 9020358 [patent_doc_number] => 08530343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'System and method for the manufacture of semiconductor devices by the implantation of carbon clusters' [patent_app_type] => utility [patent_app_number] => 13/169341 [patent_app_country] => US [patent_app_date] => 2011-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11389 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13169341 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/169341
System and method for the manufacture of semiconductor devices by the implantation of carbon clusters Jun 26, 2011 Issued
Array ( [id] => 7480763 [patent_doc_number] => 20110233657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'High-voltage vertical transistor with a varied width silicon pillar' [patent_app_type] => utility [patent_app_number] => 13/134504 [patent_app_country] => US [patent_app_date] => 2011-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4018 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20110233657.pdf [firstpage_image] =>[orig_patent_app_number] => 13134504 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/134504
High-voltage vertical transistor with a varied width silicon pillar Jun 7, 2011 Issued
Array ( [id] => 7489007 [patent_doc_number] => 20110237032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Semiconductor Package and Method for Making the Same' [patent_app_type] => utility [patent_app_number] => 13/156043 [patent_app_country] => US [patent_app_date] => 2011-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20110237032.pdf [firstpage_image] =>[orig_patent_app_number] => 13156043 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/156043
Method of making semiconductor package having redistribution layer Jun 7, 2011 Issued
Array ( [id] => 8956574 [patent_doc_number] => 08502353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Through-wafer interconnects for photoimager and memory wafers' [patent_app_type] => utility [patent_app_number] => 13/154550 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 35 [patent_no_of_words] => 3752 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154550 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154550
Through-wafer interconnects for photoimager and memory wafers Jun 6, 2011 Issued
Array ( [id] => 9245192 [patent_doc_number] => 08609472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Process for fabricating electronic components using liquid injection molding' [patent_app_type] => utility [patent_app_number] => 13/116063 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5317 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13116063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/116063
Process for fabricating electronic components using liquid injection molding May 25, 2011 Issued
Array ( [id] => 6080720 [patent_doc_number] => 20110214285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'CARBON NANOTUBE AND METAL THERMAL INTERFACE MATERIAL, PROCESS OF MAKING SAME, PACKAGES CONTAINING SAME, AND SYSTEMS CONTAINING SAME' [patent_app_type] => utility [patent_app_number] => 13/108707 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6512 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20110214285.pdf [firstpage_image] =>[orig_patent_app_number] => 13108707 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/108707
Process that includes assembling together first and second substrates the have respective first and second carbon nanotube arrays with geometrically complementary patterns May 15, 2011 Issued
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