
John P. Dulka
Examiner (ID: 19239, Phone: (571)270-7398 , Office: P/2895 )
| Most Active Art Unit | 2895 |
| Art Unit(s) | 2895, 2811, 2817 |
| Total Applications | 1057 |
| Issued Applications | 848 |
| Pending Applications | 91 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20546076
[patent_doc_number] => 20260052969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-19
[patent_title] => FABRICATION METHODS OF 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS AND CONNECTION PATH
[patent_app_type] => utility
[patent_app_number] => 19/369245
[patent_app_country] => US
[patent_app_date] => 2025-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16289
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19369245
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/369245 | FABRICATION METHODS OF 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS AND CONNECTION PATH | Oct 25, 2025 | Pending |
Array
(
[id] => 20283967
[patent_doc_number] => 20250309209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING
[patent_app_type] => utility
[patent_app_number] => 19/232790
[patent_app_country] => US
[patent_app_date] => 2025-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10606
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19232790
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/232790 | MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING | Jun 8, 2025 | Pending |
Array
(
[id] => 20540523
[patent_doc_number] => 12557612
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-17
[patent_title] => Bonding system with sealing gasket and method for using the same
[patent_app_type] => utility
[patent_app_number] => 19/040693
[patent_app_country] => US
[patent_app_date] => 2025-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 2420
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19040693
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/040693 | Bonding system with sealing gasket and method for using the same | Jan 28, 2025 | Issued |
Array
(
[id] => 20019711
[patent_doc_number] => 20250157933
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 19/022942
[patent_app_country] => US
[patent_app_date] => 2025-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23997
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022942
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/022942 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE | Jan 14, 2025 | Pending |
Array
(
[id] => 20120915
[patent_doc_number] => 20250235946
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-24
[patent_title] => PORTABLE BATTERY PACK-POWERED WELDER
[patent_app_type] => utility
[patent_app_number] => 19/018545
[patent_app_country] => US
[patent_app_date] => 2025-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19018545
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/018545 | PORTABLE BATTERY PACK-POWERED WELDER | Jan 12, 2025 | Pending |
Array
(
[id] => 20360163
[patent_doc_number] => 12476168
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => 3D semiconductor device and structure with three levels and isolation layers
[patent_app_type] => utility
[patent_app_number] => 18/778977
[patent_app_country] => US
[patent_app_date] => 2024-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 73
[patent_figures_cnt] => 74
[patent_no_of_words] => 15374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18778977
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/778977 | 3D semiconductor device and structure with three levels and isolation layers | Jul 19, 2024 | Issued |
Array
(
[id] => 20299644
[patent_doc_number] => 20250324887
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-16
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/764374
[patent_app_country] => US
[patent_app_date] => 2024-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7570
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764374
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/764374 | DISPLAY PANEL AND DISPLAY DEVICE | Jul 4, 2024 | Pending |
Array
(
[id] => 19696412
[patent_doc_number] => 20250014957
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => SEMICONDUCTOR PACKAGE HAVING INCREASED RELIABILITY
[patent_app_type] => utility
[patent_app_number] => 18/762040
[patent_app_country] => US
[patent_app_date] => 2024-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7850
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18762040
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/762040 | SEMICONDUCTOR PACKAGE HAVING INCREASED RELIABILITY | Jul 1, 2024 | Pending |
Array
(
[id] => 20141227
[patent_doc_number] => 20250248271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-31
[patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/744802
[patent_app_country] => US
[patent_app_date] => 2024-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2344
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744802
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/744802 | DISPLAY PANEL AND DISPLAY APPARATUS | Jun 16, 2024 | Pending |
Array
(
[id] => 20424478
[patent_doc_number] => 20250386564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-18
[patent_title] => PATTERNED TRENCHES FOR NANORIBBON-BASED TRANSISTOR REGISTRATION AND ALIGNMENT
[patent_app_type] => utility
[patent_app_number] => 18/740820
[patent_app_country] => US
[patent_app_date] => 2024-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9906
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740820
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/740820 | PATTERNED TRENCHES FOR NANORIBBON-BASED TRANSISTOR REGISTRATION AND ALIGNMENT | Jun 11, 2024 | Pending |
Array
(
[id] => 19467943
[patent_doc_number] => 20240321613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => SYSTEMS AND METHODS FOR SYSTEMATIC PHYSICAL FAILURE ANALYSIS (PFA) FAULT LOCALIZATION
[patent_app_type] => utility
[patent_app_number] => 18/679252
[patent_app_country] => US
[patent_app_date] => 2024-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10015
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679252
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/679252 | Systems and methods for systematic physical failure analysis (PFA) fault localization | May 29, 2024 | Issued |
Array
(
[id] => 19619498
[patent_doc_number] => 20240405178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/673002
[patent_app_country] => US
[patent_app_date] => 2024-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15253
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673002
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/673002 | DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME | May 22, 2024 | Pending |
Array
(
[id] => 19988694
[patent_doc_number] => 20250126916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => IMAGE SENSOR AND FABRICATION METHOD OF THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/650969
[patent_app_country] => US
[patent_app_date] => 2024-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9971
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650969
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/650969 | IMAGE SENSOR AND FABRICATION METHOD OF THE SAME | Apr 29, 2024 | Pending |
Array
(
[id] => 19773404
[patent_doc_number] => 20250054830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-13
[patent_title] => SEMICONDUCTOR MODULE, POWER SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE, METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/632211
[patent_app_country] => US
[patent_app_date] => 2024-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9277
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632211
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/632211 | SEMICONDUCTOR MODULE, POWER SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE, METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE | Apr 9, 2024 | Pending |
Array
(
[id] => 19964944
[patent_doc_number] => 12334464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Encapsulated package including device dies connected via interconnect die
[patent_app_type] => utility
[patent_app_number] => 18/629641
[patent_app_country] => US
[patent_app_date] => 2024-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 28
[patent_no_of_words] => 2076
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629641
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/629641 | Encapsulated package including device dies connected via interconnect die | Apr 7, 2024 | Issued |
Array
(
[id] => 19419568
[patent_doc_number] => 20240295691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH OXIDE BONDING
[patent_app_type] => utility
[patent_app_number] => 18/622867
[patent_app_country] => US
[patent_app_date] => 2024-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14703
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622867
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622867 | Multilevel semiconductor device and structure with oxide bonding | Mar 29, 2024 | Issued |
Array
(
[id] => 19337165
[patent_doc_number] => 20240251595
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => ELECTRONIC APPARATUS AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/604923
[patent_app_country] => US
[patent_app_date] => 2024-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15205
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604923
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/604923 | Electronic apparatus with polarization plate and manufacturing method thereof | Mar 13, 2024 | Issued |
Array
(
[id] => 20237531
[patent_doc_number] => 20250294850
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/602039
[patent_app_country] => US
[patent_app_date] => 2024-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602039
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/602039 | MEMORY DEVICE AND MANUFACTURING METHOD THEREOF | Mar 11, 2024 | Pending |
Array
(
[id] => 19728799
[patent_doc_number] => 20250031550
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => DISPLAY DEVICE AND METHOD FOR FABRICATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/602028
[patent_app_country] => US
[patent_app_date] => 2024-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16640
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602028
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/602028 | DISPLAY DEVICE AND METHOD FOR FABRICATION THEREOF | Mar 11, 2024 | Pending |
Array
(
[id] => 20235698
[patent_doc_number] => 20250293017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => METHODS OF FORMING CONFORMAL SILICON OXYCARBONITRIDE THIN FILMS ON HIGH ASPECT RATIO SEMICONDUCTOR STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/602159
[patent_app_country] => US
[patent_app_date] => 2024-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5547
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602159
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/602159 | METHODS OF FORMING CONFORMAL SILICON OXYCARBONITRIDE THIN FILMS ON HIGH ASPECT RATIO SEMICONDUCTOR STRUCTURES | Mar 11, 2024 | Pending |