Search

John P. Dulka

Examiner (ID: 8652, Phone: (571)270-7398 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2817, 2895
Total Applications
1010
Issued Applications
820
Pending Applications
90
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16944362 [patent_doc_number] => 11056615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Method for manufacturing light emitting module with concave surface light guide plate [patent_app_type] => utility [patent_app_number] => 16/585810 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 13790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585810 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585810
Method for manufacturing light emitting module with concave surface light guide plate Sep 26, 2019 Issued
Array ( [id] => 15717565 [patent_doc_number] => 20200105550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SUBSTRATE PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/583550 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583550 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583550
Substrate processing apparatus including periphery cover body Sep 25, 2019 Issued
Array ( [id] => 15717613 [patent_doc_number] => 20200105574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/583590 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583590 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583590
Substrate processing apparatus with moving device for connecting and disconnecting heater electrodes and substrate processing method thereof Sep 25, 2019 Issued
Array ( [id] => 16723773 [patent_doc_number] => 20210090920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => CONTAMINANT DETECTION TOOLS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/582420 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582420 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582420
Contaminant detection tools and related methods Sep 24, 2019 Issued
Array ( [id] => 16495674 [patent_doc_number] => 10861722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Integrated semiconductor processing [patent_app_type] => utility [patent_app_number] => 16/579756 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 9558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16579756 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/579756
Integrated semiconductor processing Sep 22, 2019 Issued
Array ( [id] => 16962060 [patent_doc_number] => 20210213559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => ELECTRODE RE-CONDITIONING TOOL AND METHOD OF USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/980216 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16980216 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/980216
Electrode re-conditioning tool and method of using the same Sep 19, 2019 Issued
Array ( [id] => 17063071 [patent_doc_number] => 11107681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Method of fabricating semiconductor device by removing material on back side of substrate [patent_app_type] => utility [patent_app_number] => 16/578245 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 7157 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578245 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578245
Method of fabricating semiconductor device by removing material on back side of substrate Sep 19, 2019 Issued
Array ( [id] => 15939001 [patent_doc_number] => 20200161134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => METHODS AND APPARATUS FOR INTEGRATED SELECTIVE MONOLAYER DOPING [patent_app_type] => utility [patent_app_number] => 16/577353 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577353 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577353
Methods and apparatus for integrated selective monolayer doping Sep 19, 2019 Issued
Array ( [id] => 15351961 [patent_doc_number] => 20200013872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Spacer Structure with High Plasma Resistance for Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/575974 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575974
Spacer structure with high plasma resistance for semiconductor devices Sep 18, 2019 Issued
Array ( [id] => 15415057 [patent_doc_number] => 20200027851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => Interconnect Chips [patent_app_type] => utility [patent_app_number] => 16/575573 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575573 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575573
Interconnect chips Sep 18, 2019 Issued
Array ( [id] => 15687921 [patent_doc_number] => 20200098624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => FILM FORMING METHOD AND FILM FORMING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/574757 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574757
Film forming method and film forming apparatus Sep 17, 2019 Issued
Array ( [id] => 16715943 [patent_doc_number] => 20210083090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/571817 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571817
Gate all around structure with additional silicon layer and method for forming the same Sep 15, 2019 Issued
Array ( [id] => 15775787 [patent_doc_number] => 20200118911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 16/571502 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571502
Semiconductor element including encapsulated lead frames Sep 15, 2019 Issued
Array ( [id] => 16348247 [patent_doc_number] => 20200312898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => IMAGE SENSOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/571764 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571764
Image sensor package with particle blocking dam Sep 15, 2019 Issued
Array ( [id] => 15331937 [patent_doc_number] => 20200006298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => LIGHT EMITTING DIODE PACKAGE AND LIGHT EMITTING DIODE MODULE [patent_app_type] => utility [patent_app_number] => 16/566823 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566823 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566823
Light emitting diode package and light emitting diode module Sep 9, 2019 Issued
Array ( [id] => 17002822 [patent_doc_number] => 11081645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Mask assembly with surface roughened mask sheet at welding location, method of manufacturing the same, and method of manufacturing display device using the same [patent_app_type] => utility [patent_app_number] => 16/563619 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 6999 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/563619
Mask assembly with surface roughened mask sheet at welding location, method of manufacturing the same, and method of manufacturing display device using the same Sep 5, 2019 Issued
Array ( [id] => 15597811 [patent_doc_number] => 20200075440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/560493 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560493 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560493
Semiconductor device with recessed end surface of lead Sep 3, 2019 Issued
Array ( [id] => 16553130 [patent_doc_number] => 10886295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/560606 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 9099 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560606
Semiconductor storage device Sep 3, 2019 Issued
Array ( [id] => 15840745 [patent_doc_number] => 20200135655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Graphene Layer for Reduced Contact Resistance [patent_app_type] => utility [patent_app_number] => 16/560585 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560585 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560585
Graphene layer for reduced contact resistance Sep 3, 2019 Issued
Array ( [id] => 16210505 [patent_doc_number] => 20200243495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => MULTI-LAYER POWER CONVERTER WITH DEVICES HAVING REDUCED LATERAL CURRENT [patent_app_type] => utility [patent_app_number] => 16/558679 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558679 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558679
Multi-layer power converter with devices having reduced lateral current Sep 2, 2019 Issued
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